- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98229 > THS8134BCPHP (TEXAS INSTRUMENTS INC) PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48 PDF資料下載
第1頁第2頁第3頁當前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
THS8134, THS8134A, THS8134B
TRIPLE 8BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRILEVEL SYNC GENERATION
SLVS205D MAY 1999 REVISED MARCH 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
electrical characteristics over recommended operating conditions with fCLK = 80 MSPS and use
of internal reference voltage Vref, with R(FS) = R(FSnom) (unless otherwise noted) (continued)
digital inputs dc characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IIH
High-level input current
AV
= DV
= 5 V
1
A
IIL
Low-level input current
AVDD = DVDD = 5 V
Digital inputs and CLK at 0 V for IIL;
1
A
IIL(CLK)
Low-level input current, CLK
DD
Digital inputs and CLK at 0 V for IIL;
Digital inputs and CLK at 5 V for IIH
1
A
IIH(CLK)
High-level input current, CLK
Digital inputs and CLK at 5 V for IIH
1
A
CI
Input capacitance
TA = 25°C
7
pF
ts
Data and control inputs setup time
3
ns
tH
Data and control inputs hold time
0
ns
Digital process delay from first registered color
RGB and YPbPr 4:4:4
7
CLK
td(D)
Digital process delay from first registered color
component of pixel (see Figures 35)
YPbPr 4:2:2 2
×8 bit
8
CLK
periods
td(D)
component of pixel (see Figures 35)
YPbPr 4:2:2 1
×8 bit
9
periods
This parameter is assured by design and not production tested. The digital process delay is defined as the number of CLK cycles required for
the first registered color component of a pixel, starting from the time of registering it on the input bus, to propagate through all processing and
appear at the DAC output drivers. The remaining delay through the IC is the analog delay td(A) of the analog output drivers.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| THS8134CPHP | PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48 |
| THS8134ACPHP | PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48 |
| THS8135-240IPHP | PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48 |
| THS8135-80CPHP | PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48 |
| THS8135-80IPHP | PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS8134BCPHP | 制造商:Texas Instruments 功能描述:8BIT DAC 80MSPS TRIPLE SMD 8134 |
| THS8134BCPHPG4 | 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 8-BIT 80MSPS TRIPLE DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray |
| THS8134BTQFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
| THS8134CPHP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| THS8134TQFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。