參數(shù)資料
型號: TEF6700HL
廠商: NXP SEMICONDUCTORS
元件分類: 調(diào)諧器
英文描述: Car radio tuner front-end for digital IF
中文描述: AUDIO TUNER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, SOT-314-2, MS-026, LQFP-64
文件頁數(shù): 31/56頁
文件大?。?/td> 305K
代理商: TEF6700HL
2003 Oct 21
31
Philips Semiconductors
Product specification
Car radio tuner front-end for digital IF
TEF6700HL
12 I
2
C-BUS PROTOCOL
12.1
I
2
C-bus specification
SDA and SCL HIGH and LOW levels are specified
according to a 3.3 V I
2
C-bus. The bus pins tolerate also
thresholds of a 5 V bus.
The standard I
2
C-bus specification is expanded by the
following definitions.
IC addresses:
1st IC address C2H: 1100001 R/W
2nd IC address C0H: 1100000 R/W
3rd IC address C4H: 1100010 R/W.
Structure of the I
2
C-bus logic: slave transceiver with auto
increment.
Subaddresses are not used.
The second I
2
C-bus address can be selected by
connecting pin ADDRSEL via a 120 k
resistor to GND.
The third I
2
C-bus address can be selected by connecting
pin ADDRSEL via a 33 k
resistor to GND.
The maximum bit rate for this device is 100 kbits/s.
The I
2
C-bus interface is extended with an enable input (pin
BUSENABLE). If pin BUSENABLE is HIGH the
communication with the device is active; if pin
BUSENABLE is LOW the signals on the I
2
C-bus are
ignored so that higher bit rates (>100 kbits/s) can be used
to communicate with other devices on the same I
2
C-bus.
The enable signal must not change while bus
communication takes place.
The data hold time t
HD;DAT
must be at least 1
μ
s.
No default settings at power-on reset.
I
2
C-bus
transmission is required to program the IC.
12.1.1
D
ATA TRANSFER
Data sequence: address, byte 0, byte 1, byte 2, byte 3,
byte 4, byte 5, and byte 6.
The data transfer has to be in this order. The LSB of the
address being logic 0 indicates a write operation.
Bit 7 of each byte is considered the MSB and has to be
transferred as the first bit of the byte.
The data becomes valid at the output of the internal
latches with the acknowledge of each byte. A STOP
condition after any byte can shorten transmission times.
When writing to the transceiver by using the STOP
condition before completion of the whole transfer:
The remaining bytes will contain the old information
If the transfer of a byte is not completed, this byte is lost
and the previous information is available.
12.1.2
F
REQUENCY SETTING
For new frequency setting, in both AM and FM mode, the
programmable divider is enabled by setting bit PRESET to
logic 1. To select a frequency, two I
2
C-bus transmissions
are necessary:
First: bit PRESET = 1
Second: bit PRESET = 0.
12.2
I
2
C-bus protocol
12.2.1
D
ATA TRANSFER MODE AND
IC
ADDRESS
Table 1
Write mode
Table 2
Read mode
Notes
1.
2.
3.
4.
S = START condition.
A = acknowledge.
P = STOP condition.
NA = no acknowledge.
Table 3
IC address byte
Notes
1.
Pin ADDRSEL left open-circuit activates 1st
IC address; R
ext
= 120 k
at pin ADDRSEL to ground
activates 2nd IC address; R
ext
= 33 k
at
pin ADDRSEL to ground activates 3rd IC address.
Read or write bit:
0 = write operation to TEF6700HL
1 = read operation from TEF6700HL.
2.
S
(1)
address (write)
A
(2)
data byte(s)
A
(2)
P
(3)
S
(1)
address (read)
A
(2)
data byte 0
NA
(4)
P
(3)
ADDRESS
IC ADDRESS
(1)
MODE
(2)
1
2
3
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
R/W
R/W
R/W
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