參數(shù)資料
型號(hào): TDA8762M
廠商: NXP Semiconductors N.V.
英文描述: 10-bit high-speed low-power analog-to-digital converter
中文描述: 10位高速低功耗模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 7/24頁
文件大?。?/td> 162K
代理商: TDA8762M
1996 Mar 28
7
Philips Semiconductors
Product specification
10-bit high-speed low-power
analog-to-digital converter
TDA8762
Reference voltages for the resistor ladder;
see Table 1
V
RB
V
RT
V
diff
reference voltage BOTTOM
reference voltage TOP
differential reference voltage
V
RT
V
RB
reference current
resistor ladder
temperature coefficient of the resistor
ladder
1.2
1.8
1.3
3.8
2.5
V
CCA
0.8 V V
3.0
V
V
I
ref
R
LAD
TC
RLAD
1.5
28
90
1860
167
220
220
2.06
2.5
mA
ppm
m
/K
mV
mV
V
V
osB
V
osT
V
I(p-p)
offset voltage BOTTOM
offset voltage TOP
analog input voltage
(peak-to-peak value)
note 2
note 2
note 3
Outputs
D
IGITAL OUTPUTS
D9
TO
D0
AND
IR (
REFERENCED TO
OGND)
V
OL
V
OH
LOW level output voltage
HIGH level output voltage
I
O
= 1 mA
I
O
= 0 mA
I
O
=
0.4 mA
I
O
=
1 mA
0.4 V < V
O
< V
CCO
0
2.7
2.7
2.4
20
0.4
V
CCO
0.5
V
CCO
1.3
V
CCO
1.4
+20
V
V
V
V
μ
A
I
OZ
output current in 3-state mode
Switching characteristics
C
LOCK INPUT
CLK; see Fig.4; note 1
f
clk(max)
t
CPH
t
CPL
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
40
8
8
MHz
ns
ns
Analog signal processing
L
INEARITY
INL
integral non-linearity
f
clk
= 40 MHz;
ramp input
f
clk
= 40 MHz;
ramp input
middle code;
V
RB
= 1.3 V; V
RT
= 3.8 V
V
RB
= 1.3 V;
V
RT
= 3.8 V; note 4
±
0.75
±
1.5
LSB
DNL
differential non-linearity
±
0.3
±
0.7
LSB
OFER
offset error
±
1
LSB
GER
gain error (from device to device)
±
0.1
%
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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