- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98196 > TDA7440D013TR (STMICROELECTRONICS) 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 PDF資料下載
參數(shù)資料
| 型號(hào)： | TDA7440D013TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 音頻控制 |
| 英文描述： | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
| 封裝： | SO-28 |
| 文件頁(yè)數(shù)： | 15/17頁(yè) |
| 文件大小： | 735K |
| 代理商： | TDA7440D013TR |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)當(dāng)前第15頁(yè)第16頁(yè)第17頁(yè)
7/17
TDA7440
4I2C BUS INTERFACE
Data transmission from microprocessor to the TDA7440D and vice versa takes place through the 2 wires
I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage
must be connected).
4.1 Data Validity
As shown in fig. 11, the data on the SDA line must be stable during the high period of the clock. The HIGH
and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
4.2 Start and Stop Conditions
As shown in fig. 12 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The
stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
4.3 Byte Format
Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an acknowledge
bit. The MSB is transferred first.
4.4 Acknowledge
The master (
P) puts a restive HIGH level on the SDA line during the acknowledge clock pulse (see fig.
13). The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during this
clock pulse.
The audio processor which has been addressed has to generate an acknowledge after the reception of
each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case
the master transmitter can generate the STOP information in order to abort the transfer.
4.5 Transmission without Acknowledge
Avoiding to detect the acknowledge of the audio processor, the
P can use a simpler transmission: simply
it waits one clock without checking the slave acknowledging, and sends the new data.
This approach of course is less protected from misworking.
Figure 11. Data Validity on the I2CBUS
Figure 12. Timing Diagram of I2CBUS
Figure 13. Acknowledge on the I2CBUS
SDA
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
D99AU1031
SCL
SDA
START
I2CBUS
STOP
D99AU1032
SCL
1
MSB
23789
SDA
START
ACKNOWLEDGMENT
FROM RECEIVER
D99AU1033
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA7442D | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
| TDA7442 | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDIP32 |
| TDA7442D013TR | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
| TDA7443D | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
| TDA7444 | SPECIALTY CONSUMER CIRCUIT, PDIP28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA7442 | 功能描述:多媒體雜項(xiàng) Tone Control Suround Digtal Cntrold Audio RoHS:否 制造商:Texas Instruments 類型: 通道數(shù)量: 轉(zhuǎn)換速率:540 Mbps 分辨率: 封裝 / 箱體:SOIC-16 封裝:Tube |
| TDA7442D | 功能描述:多媒體雜項(xiàng) Tone Control Suround Digtal Cntrold Audio RoHS:否 制造商:Texas Instruments 類型: 通道數(shù)量: 轉(zhuǎn)換速率:540 Mbps 分辨率: 封裝 / 箱體:SOIC-16 封裝:Tube |
| TDA7442D013TR | 功能描述:多媒體雜項(xiàng) Tone Control Suround Digtal Cntrold Audio RoHS:否 制造商:Texas Instruments 類型: 通道數(shù)量: 轉(zhuǎn)換速率:540 Mbps 分辨率: 封裝 / 箱體:SOIC-16 封裝:Tube |
| TDA7443D | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:TONE CONTROL AND SURROUND DIGITALLY CONTROLLED AUDIO PROCESSOR WITH AGC |
| TDA7448 | 功能描述:音頻放大器 6 Ch Volume CNTRL 0 to -79dB 1.0dB CNT RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。