參數(shù)資料
型號: TDA7429L
廠商: STMICROELECTRONICS
元件分類: 音頻控制
英文描述: 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDIP42
封裝: 0.600 INCH, SDIP-42
文件頁數(shù): 13/17頁
文件大?。?/td> 174K
代理商: TDA7429L
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
5/17
TDA7429L
3I2C BUS INTERFACE
Data transmission from microprocessor to the TDA7429L and viceversa takes place through the 2 wires I2C
BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be
connected).
3.1 Data Validity
As shown in fig. 5, the data on the SDA line must be stable during the high period of the clock. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.
3.2 Start and Stop Conditions
As shown in fig.6 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
VDC
DC Steps
adjacent att. steps
-3
0
3
mV
AMUTE
Output Mute Condition
+70
100
dB
RVEA
Input Impedance
21
30
39
K
AUDIO OUTPUTS
NO(OFF)
Output Noise (OFF)
Output Mute, Flat
BW = 20Hz to 20KHz
4
5
Vrms
d
Distorsion
Av = 0 ; Vin = 1Vrms
0.01
0.1
%
SC
Channel Separation
70
90
dB
VOCL
Clipping Level
d = 0.3%
2
2.5
Vrms
ROUT
Output Resistance
20
40
70
VOUT
DC Voltage Level
3.8
V
MONITOR OUTPUTS
d
Distorsion
Av = 0 ; Vin = 1Vrms
0.01
0.1
%
SC
Channel Separation
70
90
dB
VOCL
Clipping Level
d = 0.3%
2
2.5
Vrms
ROUT
Output Resistance
20
50
85
VOUT
DC Voltage Level
4.5
V
BUS INPUTS
VIL
Input Low Voltage
1V
VIH
Input High Voltage
3
V
IIN
Input Current
-5
+5
mA
VO
Output Voltage SDA
Acknowledge
IO = 1.6mA
0.4
V
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Table 5. Electrical Characteristcs (continued)
相關(guān)PDF資料
PDF描述
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