參數(shù)資料
型號: TDA7427AD
廠商: STMICROELECTRONICS
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 200 MHz, PDSO28
封裝: TSSOP-28
文件頁數(shù): 17/22頁
文件大?。?/td> 444K
代理商: TDA7427AD
ELECTRICAL CHARACTERISTICS (Tamb = 25
°C; VDD1 = 5V; VDD2 = 10V; fOSC = 4MHz; unless other-
wise specified).
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VDD1
Supply Voltage
4.5
5.0
5.5
V
VDD2
Supply Voltage
9.0
11.0
V
IDD1
Supply Current
no output load
2
4
6
mA
IDD2
Supply Current
PLL locked
1
2
3
mA
IDD1 STB
Supply Current
Standby mode
1
A
RF INPUT (AM_IN, FM_IN)
fiAM
Input Frequency AM
Vi = 100mVrms sinusoidal
0.5
64
MHz
fiFM
Input Frequency FM
Vi = 100mVrms sinusoidal
30
200
MHz
ViMIN
Min Input Voltage AM
0.5 to 16MHz range sinusoidal
30
mVrms
ViMAX
Max Input Voltage AM
0.6 to 16MHz range sinusoidal
600
mVrms
ViMIN
Min Input Voltage FM
70 to 120MHz range sinusoidal
30
mVrms
ViMAX
Max Input Voltage FM
70 to 120MHz range sinusoidal
600
mVrms
Zin
Input Impedance FM input
3
4
5
K
Zin
Input Impedance AM input
3
4
5
K
IF COUNTER (IF_AM, IF_FM)
fiAM
Input Frequency range AM
Vi = 100mVrms
0.400
11
MHz
fiAM
Input Frequency range FM
Vi = 100mVrms
10
11
MHz
ViMIN
Min Input Voltage AM IF pin
fin = 455kHz
30
mVrms
ViMIN
Min Input Voltage FM IF pin
fin = 10.7MHz
30
mVrms
ViMAX
Max Input Voltage AM IF pin
fin = 455kHz
600
mVrms
ViMAX
Max Input Voltage FM IF pin
fin = 10.7MHz
600
mVrms
Zin
Input Inpedance FM IF pin
3
4
5
K
Zin
Input Inpedance AM IF pin
3
4
5
K
BUS INTERFACE
Tj
Noise Suppression Time
Constant on SCL, SDA Input
50
ns
fSCL
SCL Clock Frequency
400
kHz
tAA
SCL Low to SDA Data Valid
300
ns
tbuf
Time the bus must be free for
the new transmission
4.7
s
tHD-START
START Condition hold time
4.0
s
tLOW
Clock Low Period
4.7
s
tHIGH
Clock High Period
4.0
s
tSU-SDA
Start Condition Setup Time
4.7
s
tHD-DATA
Data Input Hold Time
1
s
tSU-DATA
Data Input Setup Time
250
ns
tR
SDA & SCL Rise Time
1
s
tF
SDA & SCL Full Time
0.3
s
tSU-STOP
Stop Condition Setup Time
4.7
s
tDH
DATA OUT Time
300
ns
TDA7427A
4/21
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