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參數(shù)資料
| 型號(hào)： | TCM809TVNBTR |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| 封裝： | TO-236, SOT-23B, 3 PIN |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 53K |
| 代理商： | TCM809TVNBTR |
3
TCM809/810-01
1/22/01
TCM809
TCM810
3-Pin Microprocessor Reset Monitors
2001 Microchip Technology Inc.
DS21602A
TCM809
VCC
R1
100k
RESET
GND
Combinations above the curve are detected as a brown-
out or power-down. Transient immunity can be improved by
adding a capacitor in close proximity to the VCC pin of the
TCM809/810.
RESET Signal Integrity During Power-Down
The TCM809 RESET output is valid to VCC = 1.0V.
Below this voltage the output becomes an "open circuit" and
does not sink current. This means CMOS logic inputs to the
P will be floating at an undetermined voltage. Most digital
systems are completely shutdown well above this voltage.
However, in situations where RESET must be maintained
valid to VCC = 0V, a pull-down resistor must be connected
from RESET to ground to discharge stray capacitances and
hold the output low (Figure 2). This resistor value, though not
critical, should be chosen such that it does not appreciably
load RESET under normal operation (100k
will be suitable
for most applications). Similarly, a pull-up resistor to VCC is
required for the TCM810 to ensure a valid high RESET for
VCC below 1.0V.
APPLICATIONS INFORMATION
VCC Transient Rejection
The TCM809/810 provides accurate VCC monitoring
and reset timing during power-up, power-down, and brown-
out/sag conditions, and rejects negative-going transients
(glitches) on the power supply line. Figure 1 shows the
maximum transient duration vs. maximum negative excur-
sion (overdrive) for glitch rejection. Any combination of
duration and overdrive which lies under the curve will not
generate a reset signal.
PIN DESCRIPTION
Pin No.
Symbol
Description
1
GND
Ground
2
RESET (TCM809)
RESET output remains low while VCC is below the reset voltage threshold, and
for 240msec (140msec min.) after VCC rises above reset threshold.
2
RESET (TCM810)
RESET output remains high while VCC is below the reset voltage threshold,
and for 240msec (140msec min.) after VCC rises above reset threshold.
3VCC
Supply voltage (+2.5V, +3.0V, +3.3V, +5.0V)
Figure 2. Ensuring RESET Valid to VCC = 0V
Figure 1. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25
°C
RESET COMPARATOR OVERDRIVE,
[V
TH - VCC](mV)
400
240
160
320
80
0
1
5
100
1000
MAXIMUM
TRANSIENT
DURATION
(
sec)
TA = +25°C
VTH
Duration
Overdrive
VCC
TCM8XXL/M/J
TCM8XXZ/R/S/T
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