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3
HIGH FREQUENCY 7660 DC-TO-DC
VOLTAGE CONVERTER
TC7660H
TC7660H-2 10/1/96
2001 Microchip Technology Inc. DS21466A
Detailed Description
The TC7660H contains all the necessary circuitry to
implement a voltage inverter, with the exception of two
external capacitors, which may be inexpensive 1.0
μ
F
non-polarized capacitors. Operation is best understood by
considering Figure 2, which shows an idealized voltage
inverter. Capacitor C
1
is charged to a voltage, V
+
, for the half
cycle when switches S
1
and S
3
are closed. (Note:
Switches
S
2
and S
4
are open during this half cycle.) During the second
half cycle of operation, switches S
2
and S
4
are closed, with
S
1
and S
3
open, thereby shifting capacitor C
1
negatively by
V
+
volts. Charge is then transferred from C
1
to C
2
, such that
the voltage on C
2
is exactly V
+
, assuming ideal switches and
no load on C
2
.
V+
GND
S3
S1
S2
S4
C2
VOUT
=
–
VIN
Figure 2. Idealized Charge Pump Inverter
Figure 1. TC7660H Test Circuit
1
2
3
4
8
7
6
5
TC7660H
+
V+
(+5V)
C1
1.0
μ
F
+
C2
1.0
μ
F
RL
IS
To improve low-voltage operation, the LV pin should be
connected to GND. For supply voltages greater than 3.5V,
the LV terminal
must be left open to ensure latch-up-
proof operation and prevent device damage
.
Theoretical Power Efficiency Considerations
In theory, a capacitative charge pump can approach
100% efficiency if certain conditions are met:
(1) The drive circuitry consumes minimal power.
(2) The output switches have extremely low ON
resistance and virtually no offset.
(3) The impedances of the pump and reservoir
capacitors are negligible at the pump frequency.
The TC7660H approaches these conditions for nega-
tive voltage multiplication if large values of C
1
and C
2
are
used.
Energy is lost only in the transfer of charge
between capacitors if a change in voltage occurs.
The
energy lost is defined by:
E = 1/2 C
1
(V
12
– V
22
)
V
1
and V
2
are the voltages on C
1
during the pump and
transfer cycles. If the impedances of C
1
and C
2
are relatively
high at the pump frequency (refer to Figure 1), compared to
the value of R
L
, there will be a substantial difference in
voltages V
1
and V
2
. Therefore, it is not only desirable to
make C
2
as large as possible to eliminate output voltage
ripple, but also to employ a correspondingly large value for
C
1
in order to achieve maximum efficiency of operation.
Do's and Don'ts
Do not exceed maximum supply voltages.
Do not connect LV terminal to GND for supply voltages
greater than 3.5V.
Do not short circuit the output to V
+
supply for voltages
above 5.5V for extended periods; however, transient
conditions including start-up are okay.
When using polarized capacitors in the inverting mode,
the + terminal of C
1
must be connected to pin 2 of the
TC7660H and the + terminal of C
2
must be connected
to GND Pin 3.