參數(shù)資料
型號: TC7MH574FK
廠商: Toshiba Corporation
英文描述: TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
中文描述: 東芝的CMOS數(shù)字集成電路硅單片
文件頁數(shù): 5/8頁
文件大?。?/td> 126K
代理商: TC7MH574FK
TC7MH574FK
2001-10-23
5
AC Characteristics
(Input: t
r
t
f
3 ns)
Ta 25°C
Ta 40~85°C
Characteristics
Symbol
Test Condition
V
CC
(V)
C
L
(pF)
Min
Typ.
Max
Min
Max
Unit
15
8.5
13.2
1.0
15.5
3.3 0.3
50
11.0
16.7
1.0
19.0
15
5.6
8.6
1.0
10.0
Propagation delay time
(CK-Q)
t
pLH
t
pHL
5.0 0.5
50
7.1
10.6
1.0
12.0
ns
15
8.2
12.8
1.0
15.0
3.3 0.3
50
10.7
16.3
1.0
18.5
15
5.9
9.0
1.0
10.5
3-state output enable time
t
pZL
t
pZH
R
L
1 k
5.0 0.5
50
7.4
11.0
1.0
12.5
ns
3.3 0.3
50
11.0
15.0
1.0
17.0
3-state output disable time
t
pLZ
t
pHZ
R
L
1 k
5.0 0.5
50
7.1
10.1
1.0
11.5
ns
15
80
125
65
3.3 0.3
50
50
75
45
15
130
180
110
Maximum clock frequency
f
max
5.0 0.5
50
85
115
75
MHz
3.3 0.3
50
1.5
1.5
Output to output skew
t
osLH
t
osHL
(Note1)
5.0 0.5
50
1.0
1.0
ns
Input capacitance
C
IN
C
OUT
4
10
10
pF
Output capacitance
6
pF
Power dissipation
capacitance
C
PD
(Note2)
28
pF
Note1: This parameter is guaranteed by design.
t
osLH
|t
pLHm
t
pLHn
|, t
osHL
|t
pHLm
t
pHLn
|
Note2: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
C
PD
V
CC
f
IN
I
CC
/8 (per F/F)
And the total C
PD
when n pcs of latch operate can be gained by the following equation:
C
PD
(total) 20 8
n
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