參數(shù)資料
型號： TC1320EUATR
廠商： Microchip Technology
文件頁數(shù)： 11/14頁
文件大小： 0K
描述： IC DAC 8BIT 2WIRE I2C 8MSOP
標準包裝： 2,500
設(shè)置時間： 10µs
位數(shù)： 8
數(shù)據(jù)接口： I²C
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 8-MSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 1 電壓，單極
采樣率（每秒）： *
TC1320
DS21386B-page 6
2002 Microchip Technology Inc.
3.0
DETAILED DESCRIPTION
The TC1320 is a monolithic 8-bit digital-to-analog con-
verter, that is designed to operate from a single supply
that can range from 2.7V to 5.5V. The DAC consists of
a data register (DATA), a configuration register
(CONF), and a current output amplifier. The TC1320
uses an external reference, which also determines the
maximum output voltage.
The TC1320 uses a current steering DAC, based on an
array of matched current sources. This current, along a
precision resistor, converts the contents of the Data
Register and VREF into an output voltage, VOUT given
by:
VOUT =VREF (DATA/256)
3.1
Reference Input
The reference pin, VREF, is a buffered high-impedance
input and because of this, the load regulation of the ref-
erence source needs only to be able to tolerate leakage
levels of current (less than 1
A). VREF accepts a volt-
age range from 0 to (VDD – 1.2V). Input capacitance is
typically 10pF.
3.2
Output Amplifier
The TC1320 DAC output is buffered with an internal
unity gain rail-to-rail input/output amplifier, with a typical
slew rate of 0.8V/
sec. Maximum full scale transition
settling time is 10
sec to within ±1/2LSB when loaded
with 1k
in parallel with 100pF.
3.3
Standby Mode
The TC1320 allows the host to put it into a Low Power
(IDD =0.5A, typical) Standby mode. In this mode, the
D/A conversion is halted. The SMBus port operates
normally. Standby mode is enabled by setting the
SHDN bit in the CONFIG register. The table below
summarizes this operation.
TABLE 3-1:
STANDBY MODE OPERATION
3.4
SMBus Slave Address
The TC1320 is internally programmed to have a default
SMBus address value of 1001
000b
. Seven other
addresses are available by custom order (contact fac-
tory). See Figure 3-1 for locating address bits in SMBus
protocol.
FIGURE 3-1:
SMBus PROTOCOLS
SHDN Bit
Operating Mode
0Normal
1
Standby
S
Address
R/W
ACK
Command
ACK
Data
ACK
P
8-Bits
7-Bits
8-Bits
Slave Address
Command Byte: selects
which register you are
writing to.
Data Byte: data goes
into the register set
by the command byte.
Write 1-Byte Format
Read 1-Byte Format
S
Address
R/W
ACK
Command
ACK
S
Address
R/W ACK
Data
NACK
P
7-Bits
8-Bits
7-Bits
8-Bits
Slave Address
Command Byte: selects
which register you are
reading from.
Slave Address: repeated
due to change in data
flow direction.
Data Byte: reads from
the register set by the
command byte.
Receive 1-Byte Format
S
Address
R/W ACK
Data
NACK
P
7-Bits
1
0
8-Bits
Data Byte: reads data from
the register commanded by
the last Read Byte or Write
Byte transmission.
S = START Condition
P = STOP Condition
Shaded = Slave Transmission
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