參數(shù)資料
型號: TC1302BDTVMFTR
廠商: Microchip Technology Inc.
元件分類: 基準電壓源/電流源
英文描述: LOW QUIESCENT CURRENT DUAL OUTPUT LDO
中文描述: 低靜態(tài)電流雙輸出穩(wěn)壓器
文件頁數(shù): 13/26頁
文件大?。?/td> 570K
代理商: TC1302BDTVMFTR
2005 Microchip Technology Inc.
DS21333B-page 13
TC1302A/B
5.9
TC1302A SHDN2 Timing
V
OUT1
will rise independent of the level of SHDN2 for
the TC1302A. Figure 5-1 is used to define the wake-up
time from shutdown (t
WK
) and the settling time (t
S
). The
wake-up time is dependant upon the frequency of
operation. The faster the SHDN pin is pulsed, the
shorter the wake-up time will be.
FIGURE 5-1:
TC1302A Timing.
5.10
TC1302B SHDN1/SHDN2 Timing
For the TC1302B, the SHDN1 input pin is used to
control V
OUT1
. The SHDN2 input pin is used to control
V
OUT2
, independent of the logic input on SHDN1.
FIGURE 5-2:
TC1302B Timing.
5.11
Device Protection
5.11.1
OVERCURRENT LIMIT
In the event of a faulted output load, the maximum
current the LDO output will permit to flow is limited
internally for each of the TC1302A/B outputs. The peak
current limit for V
OUT1
is typically 1.1A, while the peak
current limit for V
OUT2
is typically 0.5A. During short-
circuit operation, the average current is limited to
200 mA for V
OUT1
and 140 mA for V
OUT2
.
5.11.2
OVERTEMPERATURE
PROTECTION
If the internal power dissipation within the TC1302A/B
is excessive due to a faulted load or higher-than-
specified line voltage, an internal temperature-sensing
element will prevent the junction temperature from
exceeding approximately 150
°
C. If the junction
temperature does reach 150
°
C, both outputs will be
disabled until the junction temperature cools to
approximately 140
°
C and the device resumes normal
operation. If the internal power dissipation continues to
be excessive, the device will again shut off.
V
IN
SHDN2
V
OUT1
V
OUT2
t
wk
t
s
SHDN2
SHDN1
V
IN
V
OUT1
t
wk
t
s
V
OUT2
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