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參數(shù)資料
| 型號： | TC1302B |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | LOW QUIESCENT CURRENT DUAL OUTPUT LDO |
| 中文描述： | 低靜態(tài)電流雙輸出穩(wěn)壓器 |
| 文件頁數(shù)： | 14/26頁 |
| 文件大?。?/td> | 570K |
| 代理商： | TC1302B |
TC1302A/B
DS21333B-page 14
2005 Microchip Technology Inc.
6.0
APPLICATION CIRCUITS/
ISSUES
6.1
Typical Application
The TC1302A/B is used for applications that require
the integration of two LDOs.
FIGURE 6-1:
TC1302A/B.
Typical Application Circuit
6.1.1
APPLICATION INPUT CONDITIONS
6.2
Power Calculations
6.2.1
POWER DISSIPATION
The internal power dissipation within the TC1302A/B is
a function of input voltage, output voltage, output
current and quiescent current. The following equation
can be used to calculate the internal power dissipation
for each LDO.
EQUATION 6-1:
In addition to the LDO pass element power dissipation,
there is power dissipation within the TC1302A/B as a
result of quiescent or ground current. The power
dissipation, as a result of the ground current, can be
calculated using the following equation.
EQUATION 6-2:
The total power dissipated within the TC1302A/B is the
sum of the power dissipated in both of the LDOs and
the P(I
GND
) term. Because of the CMOS construction,
the typical I
GND
for the TC1302A/B is 116 μA.
Operating at a maximum of 4.2V results in a power
dissipation of 0.5 milliWatts. For most applications, this
is small compared to the LDO pass device power dissi-
pation and can be neglected.
The
maximum
continuous
temperature specified for the TC1302A/B is +125
°
C
.
To
estimate the internal junction temperature of the
TC1302A/B, the total internal power dissipation is
multiplied by the thermal resistance from junction to
ambient (R
θ
JA
) of the device. The thermal resistance
from junction-to-ambient for the 3x3DFN8 pin package
is estimated at 41
°
C/W.
operating
junction
EQUATION 6-3:
Package Type = 3x3DFN8
Input Voltage Range = 2.7V to 4.2V
V
IN
maximum = 4.2V
V
IN
typical = 3.6V
V
OUT1
= 300 mA maximum
V
OUT2
= 150 mA maximum
8
4
1
2
3
NC
GND
NC
V
IN
7
BATTERY
C
1 μF Ceramic
X5R
C
1 μF
TC1302A
C
1 μF Ceramic
X5R
C
10 nF Ceramic
Bypass
2.7V
to
4.2V
V
OUT2
6
SHDN2
ON/OFF Control V
OUT2
2.8V @ 300 mA
1.8V
@ 150 mA
5
V
OUT1
8
4
1
2
3
NC
BATTERY
C
OUT1
1 μF Ceramic
X5R
IN
C
TC1302B
C
1 μF Ceramic
X5R
Bypass
V
IN
7
2.7V
to
4.2V
V
OUT2
6
SHDN2
ON/OFF Control V
OUT2
2.8V @ 300 mA
1.8V
@ 150 mA
5
ON/OFF Control V
OUT1
V
OUT1
GND
SHDN1
P
LDO
V
IN MAX
)
)
V
OUT MIN
)
–
(
)
I
OUT MAX
)
)
×
=
P
LDO
= LDO Pass device internal power
dissipation
V
IN(MAX)
= Maximum input voltage
V
OUT(MIN)
= LDO minimum output voltage
P
I GND
)
V
IN MAX
)
I
VIN
×
=
P
I(GND)
= Total current in ground pin.
V
IN(MAX)
= Maximum input voltage.
I
VIN
= Current flowing in the V
IN
pin with
no output current on either LDO output.
T
J MAX
)
P
TOTAL
R
θ
JA
×
T
AMAX
+
=
T
J(MAX)
= Maximum continuous junction
temperature.
P
TOTAL
= Total device power dissipation.
R
θ
JA
= Thermal resistance from junction
to ambient.
T
AMAX
= Maximum Ambient Temperature.
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