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參數(shù)資料
| 型號： | TC1270ANRCVCTTR |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | Voltage Supervisor with Manual Reset Input |
| 中文描述： | 電壓監(jiān)控器，帶有手動復位輸入 |
| 文件頁數(shù)： | 19/40頁 |
| 文件大?。?/td> | 384K |
| 代理商： | TC1270ANRCVCTTR |
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2007 Microchip Technology Inc.
DS22035B-page 19
TC1270A/70AN/71A
Table 4-2
shows the various device trip point options
and their V
TRIP(MAX)
and V
TRIP(MIN)
voltages. Also the
negative percentage change from common regulated
voltages is shown.
In the case where V
DD
is falling from the regulated volt-
age, as the V
DD
crosses the V
TRIP
voltage the
RST/RST pin is driven active. Now the desired circuitry
is in reset, or the circuitry has the indication that the
V
DD
is below the selected V
TRIP
.
In the case where V
DD
is rising. As the V
DD
crosses the
V
TRIP
voltage, the RST/RST pin is driven inactive after
the Reset Delay Timer elapses. Now the desired cir-
cuitry is released from reset and will start to operate in
its normal mode, or the circuitry has the indication that
the V
DD
is above the selected V
TRIP
.
TABLE 4-2:
SELECTING THE TRIP POINT
The TC1270A/TC1270AN/TC1271A devices are
optimized to reject fast transient glitches on the V
DD
line. If the low input signal (which is below V
TRIP
) is not
rejected, the Reset output is driven active within 50 μs
of V
DD
falling through the Reset voltage threshold.
After the device exits the Reset condition, the delay
circuitry will hold the RST/RST pin active until the
appropriate Reset delay time (t
RST
) has elapsed.
During device power up, the input voltage is below the
Trip Point voltage. The device must enter the valid
operating range for the device to start operation.
4.2.1
HYSTERESIS
There is also a minimal hysteresis (V
HYS
) on the trip
point. This is so that small noise signals on the device
voltage (V
DD
) do not cause the Reset pin (RST/RST) to
“jitter” (change between driving an active and inactive).
The characterization graphs shown in Figures
2-13
through
2-15
shows the device hysteresis as a percent-
age of the voltage trip point (V
TRIP
).
The Reset Delay Timer (t
RST
) gives a time based hys-
teresis for the system.
4.2.2
POWER-UP/RISING V
DD
As the device V
DD
rises, the device’s Reset circuit will
remain active until the voltage rises above the “actual”
trip point (V
TRIP
).
Figure 4-7
shows a power-up sequence and the wave-
form of the RST and RST pins. As the device powers
up, the voltage will start below the valid operating volt-
age of the device. At this voltage, the RST/RST output
is not valid. Once the voltage is above the minimum
operating voltage (1V) and below the selected V
TRIP
,
the Reset output will be active.
Once the device voltage rises above the V
TRIP
voltage,
the Reset delay timer (t
RST
) starts. When the Reset
delay timer times out, the Reset output (RST/RST) is
driven inactive.
FIGURE 4-7:
Power-up.
RST/RST pin Operation
Trip
Voltage
Selection
V
TRIP(MAX)(1)
/
V
TRIP(MIN)(2)
- % From
Regulated Voltage
5.0V
3.3V
3.0V
L
4.75V
4.50V
4.50V
4.25V
3.15V
3.00V
3.00V
2.85V
2.70V
2.55V
5.0%
10.0%
10.0%
15.0%
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
M
T
4.5%
9.2%
9.2%
13.7%
—
—
S
R
10.0%
15.0%
Note 1:
Voltage regulator circuit must have tighter
tolerance (%) than V
TRIP(MAX)
% from
regulated voltage.
Circuitry being reset must have a wider
tolerance (%) than V
TRIP(MIN)
% from
regulated voltage.
2:
V
TRIP
1V
V
DD
t
RST
(1)
RST
(2)
RST
Note 1:
Additional system current is consumed
during the t
RST
time.
2:
The TC1270AN requires an external
pull-up resistor.
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| TC1270ANRCVRCTR | Voltage Supervisor with Manual Reset Input |
| TC1270ANRVCTTR | Voltage Supervisor with Manual Reset Input |
| TC1270ANRVRCTR | Voltage Supervisor with Manual Reset Input |
| TC1270ANSBVCTTR | Voltage Supervisor with Manual Reset Input |
| TC1270ANSBVRCTR | Voltage Supervisor with Manual Reset Input |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TC1270ANRCVRCTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
| TC1270ANRVCTTR | 功能描述:監(jiān)控電路 5Pin uP Reset Mon 2.63V Reset Thresh RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TC1270ANRVRCTR | 功能描述:監(jiān)控電路 4Pin uP Reset Mon 2.63V Reset Thresh RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TC1270ANSBVCTTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
| TC1270ANSBVRCTR | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Voltage Supervisor with Manual Reset Input |
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