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參數(shù)資料
| 型號： | TC1263-5.0VOA |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 500 mA, Fixed-Output, CMOS LDO with Shutdown |
| 中文描述： | 500毫安，固定輸出，具有關(guān)斷功能的CMOS LDO穩(wěn)壓器 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 209K |
| 代理商： | TC1263-5.0VOA |
2005 Microchip Technology Inc.
DS21374C-page 7
TC1263
4.0
DETAILED DESCRIPTION
The TC1263 is a precision, fixed-output LDO. Unlike
bipolar regulators, the TC1263’s supply current does
not increase with load current. In addition, V
OUT
remains stable and within regulation over the entire
0 mA to I
LOADMAX
load current range (an important
consideration in RTC and CMOS RAM battery back-up
applications).
Figure 4-1 shows a typical application circuit.
FIGURE 4-1:
Typical Application Circuit.
4.1
Output Capacitor
A 1 μF (min.) capacitor from V
OUT
to ground is
required. The output capacitor should have an Effective
Series Eesistance (ESR) greater than 0.1
Ω
and less
than 5
Ω
. A 1 μF capacitor should be connected from
V
IN
to GND if there is either more than 10 inches of wire
between the regulator and the AC filter capacitor or a
battery is used as the power source. Aluminum
electrolytic or tantalum capacitor types can be used.
Since many aluminum electrolytic capacitors freeze at
approximately
-30°C,
recommended for applications operating below -25°C.
When operating from sources other than batteries,
supply-noise rejection and transient response can be
improved by increasing the value of the input and
output capacitors, and by employing passive filtering
techniques.
solid
tantalums
are
4.2
ERROR Output
ERROR is driven low whenever V
OUT
falls out of
regulation by more than – 5% (typ.). This condition may
be caused by low input voltage, output current limiting
or thermal limiting. The ERROR threshold is 5% below
rated V
OUT
, regardless of the programmed output
voltage value (e.g., ERROR = V
OL
at 4.75V (typ.) for a
5.0V regulator and 2.85V (typ.) for a 3.0V regulator).
ERROR output operation is shown in Figure 4-2.
Note that ERROR is active when V
OUT
is at or below
V
TH
, and inactive when V
OUT
is above V
TH
+ V
HYS
.
As shown in Figure 4-1, ERROR can be used as a
battery-low flag or as a processor RESET signal (with
the addition of timing capacitor C
3
). R
1
x C
3
should be
chosen to maintain ERROR below V
IH
of the processor
RESET input for at least 200 ms to allow time for the
system to stabilize. Pull-up resistor R
1
can be tied to
V
OUT
, V
IN
or any other voltage less than (V
IN
+ 0.3V).
FIGURE 4-2:
ERROR Output Operation.
C
1
R
1
1 M
V
+
TC1263
GND
V
IN
Battery
V
OUT
ERROR
SHDN
V
OUT
1 μF
+
+
Shutdown Control
(to CMOS Logic or Tie
to V
IN
, if unused)
C
2
1 μF
+
C
Required Only
if ERROR is used as a
Processor RESET Signal
(See Text)
C
3
0.2 μF
+
BATTLOW
or RESET
V
OUT
V
TH
V
OH
Hysteresis (V
HYS
)
V
OL
ERROR
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