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參數(shù)資料
| 型號： | TC1226 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | Inverting Dual (-VIN, -2VIN) Charge Pump Voltage Converters |
| 中文描述： | 反相雙（- VIN，這- 2VIN）電荷泵電壓轉(zhuǎn)換器 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 1194K |
| 代理商： | TC1226 |
4
Inverting Dual (
–
V
IN
,
–
2V
IN
)
Charge Pump Voltage Converters
TC1225
TC1226
TC1227
TC1225/6/7-1 3/24/00
2001 Microchip Technology Inc. DS21369A
The internal switch resistance for the first stage (i.e.
R
SWITCH1
) is approximately 3
and the switch resistance for
the second stage (i.e. R
SWITCH2
) is approximately 7
.
The losses in the circuit due to factor (4) above are also
shown in Equation 2a for stage 1 and Equation 2b for stage
2. The output voltage ripple for stage 1 is given by Equation
3a and the output voltage ripple for stage 2 is given by
Equation 3b.
P
LOSS1 (4)
=
[
(0.5)(C1)(V
IN
2
– V
OUT12
) + (0.5)
(C
OUT1
) (V
RIPPLE12
- 2V
OUT1
V
RIPPLE1
)
]
x f
OSC
Equation 2a.
P
LOSS2 (4)
=
[
(0.5) (C2) (V
IN
2
– V
OUT22
) + (0.5)
(C
OUT2
) (V
RIPPLE22
- 2V
OUT2
V
RIPPLE2
)
]
x f
OSC
Equation 2b.
V
RIPPLE1
= [ I
OUT1
/ (f
OSC
) (C
OUT1
) ] + 2 (I
OUT1
)
(ESR
COUT1
)
Equation 3a.
V
RIPPLE2
= [ I
OUT2
/ (f
OSC
) (C
OUT2
) ] + 2 (I
OUT2
)
(ESR
COUT2
)
Equation 3b.
Capacitor Selection
In order to maintain the lowest output resistance and
output ripple voltage, it is recommended that low ESR
capacitors be used. Additionally, larger values of C1 and C2
will lower the output resistance and larger values of C
OUT1
and C
OUT2
will reduce output ripple. (See Equations 1a, 1b,
3a, and 3b).
NOTE: For proper charge pump operation,
C1 and C
OUT1
must have a voltage rating greater than or
equal to V
IN
, while C2 and C
OUT2
must have a voltage
rating greater than or equal to 2V
IN
.
Table 1a shows various values of C1 and the corre-
sponding output resistance values for V
IN
=5V @ +25
°
C for
stage 1 and Table 1b shows various values of C2 and the
corresponding output resistance values for V
IN
=5V @ +25
°
C
for stage 2. It assumes a 0.1
ESR
C1
, a 0.1
ESR
C2
, a 3
R
SWITCH1
, and a 7
R
SWITCH2
.
Table 2a shows the output voltage ripple for various
values of C
OUT1
and Table 2b shows the output voltage
ripple for various values of C
OUT2
(again assuming V
IN
=5V
@ +25
o
C). The V
RIPPLE1
values assume a 3mA output load
current for stage 1 and a 0.1
ESR
COUT1
. The V
RIPPLE2
values assume a 200uA output load current for stage 2 and
a 0.1
ESR
COUT1
.
Input Supply Bypassing
TheV
IN
input should be capacitively bypassed to reduce
AC impedance and minimize noise effects due to the switch-
ing internal to the device. It is recommended that a large
value capacitor (at least equal to C1) be connected from V
IN
to GND for optimal circuit performance.
Table 1a. Output Resistance vs. C1 (ESR = 0.1
). For Stage 1
C1 (
μ
F)
TC1225 R
OUT
(
)
TC1226 R
OUT
(
)
TC1227 R
OUT
(
)
0.47
1
3.3
202
108
50
85
53
33
42
33
27
Table 1b. Output Resistance vs. C2 (ESR = 0.1
). For Stage 2
C2 (
μ
F)
TC1225 R
OUT
(
)
TC1226 R
OUT
(
)
TC1227 R
OUT
(
)
0.1
0.47
1
890
239
140
342
117
85
137
74
65
Table 2a. Output Voltage Ripple vs. C
OUT1
(ESR = 0.1
) For Stage 1
(I
OUT1
= 3mA)
C
OUT1
TC1225 V
RIPPLE1
TC1226 V
RIPPLE1
TC1227 V
RIPPLE1
(
μ
F)
(mV)
(mV)
(mV)
0.47
1
3.3
533
251
76
183
86
27
52
25
8
Table 2b. Output Voltage Ripple vs. C
OUT2
(ESR = 0.1
) For Stage 2
(I
OUT2
= 200
μ
A)
C
OUT2
TC1225 V
RIPPLE2
TC1226 V
RIPPLE2
TC1227 V
RIPPLE2
(
μ
F)
(mV)
(mV)
(mV)
0.1
0.47
1
167
36
17
57
12
5.8
16
3.4
1.6
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