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參數(shù)資料
| 型號(hào)： | TB28F800CV-T80 |
| 廠商： | Intel Corp. |
| 英文描述： | 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| 中文描述： | 2兆位SmartVoltage啟動(dòng)塊閃存系列 |
| 文件頁(yè)數(shù)： | 23/55頁(yè) |
| 文件大?。?/td> | 638K |
| 代理商： | TB28F800CV-T80 |
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E
2-MBIT SmartVoltage BOOT BLOCK FAMILY
23
SEE NEW DESIGN RECOMMENDATIONS
SR.7 = 1
NO
YES
Start
Write 40H,
Word/Byte Address
Write Word/Byte
Data/Address
Full Status
Check if Desired
Word/Byte Program
Complete
FULL STATUS CHECK PROCEDURE
1
0
Read Status Register
Data (See Above)
1
0
Read
Status Register
V
PP
Range Error
Bus
Operation
Command
Comments
Standby
Standby
Check SR.3
1 = V
PP
Low Detect
SR.3 MUST be cleared, if set during a program attempt, before further
attempts are allowed by the Write State Machine.
SR.4 is only cleared by the Clear Status Register Command, in cases
where multiple bytes are programmed before full status is checked.
If error is detected, clear the Status Register before attempting retry or
other error recovery.
Bus
Operation
Command
Comments
Write
Write
Setup
Program
Data = Data to Program
Addr = Location to Program
Read
Data = 40H
Addr = Word/Byte to Program
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent word/byte program operations.
SR Full Status Check can be done after each word/byte program,
or after a sequence of word/byte programs.
Write FFH after the last program operation to reset device to
read array mode.
Standby
SR.3 =
SR.4 =
Word/Byte Program
Error
Word/Byte Program
Successful
Check SR.4
1 = Word/Byte Program Error
Program
Status Register Data Toggle CE#
or OE# to Update SRD
0530_09
Figure 9. Automated Word/Byte Programming Flowchart
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