參數(shù)資料
型號: TAS5110ADADR
廠商: Texas Instruments, Inc.
英文描述: PurePath Digital AMPLIFIER TAS5110A 50-W DIGITAL AMPLIFIER POWER STAGE
中文描述: PurePath Digital數(shù)字功放TAS5110A 50 - W數(shù)字放大器功率級
文件頁數(shù): 6/17頁
文件大?。?/td> 165K
代理商: TAS5110ADADR
TAS5110A
SLES079A
APRIL 2003
REVISED MAY 2003
www.ti.com
6
FUNCTIONAL DESCRIPTION
PWM H-Bridge State Control
The digital interface control signals consists of PWM_AP, PWM_AM, PWM_BP, and PWM_BM. These signals are
a complementary differential signal format for the A-side half-bridge and the B-side half-bridge.
Bootstrapped Gate Drive
The TAS5110A includes two dedicated bootstrapped power supplies. A bootstrap capacitor is connected between
the individual bootstrap pin and the associated output. For example, a capacitor is connected between the
BOOTSTRAPA pin and the OUTPUTA pin and another capacitor is connected between the BOOTSTRAPB pin and
the OUTPUTB pin. The bootstrap power supply minimizes the number of high voltage power supply levels externally
supplied to the system, while providing a low-noise supply level for driving the high-side N-channel DMOS transistors.
Low-Dropout Voltage Regulator
Two on-chip low-dropout voltage regulators (LDO) are provided to minimize the number of external power supplies
needed for the system. These voltage regulators are for internal circuits only and cannot be used for external circuitry.
Each LDO is dedicated to a half-bridge and its gate driver. An LDO output capacitor is connected between the
individual LDO output pin and the associated output return. For example, a capacitor is connected between the
LDROUTA pin and the PVSS pin and another capacitor is connected between the LDROUTB pin and the PVSS pin.
High-Current H-bridge Output Stage
The positive outputs of the H-bridge are the two OUTPUTA pins. The negative outputs of the H-bridge are the two
OUTPUTB pins. The logic for the input command to H-bridge outputs is described in the
H-bridge output mapping
section immediately following. When the TAS5110A is in the normal mode, as seen in the H-bridge output mapping
tables, the outputs are decoded from the inputs. However, the TAS5110A is immediately shut down if any of the
following error conditions occur: overcurrent, overtemperature, low regulator output voltage, or an illegal PWM input
state is applied. For these conditions, the outputs are set to the appropriate disabled state as specified in the H-bridge
output mapping section, and the SHUTDOWN pin is set low.
H-Bridge Output Mapping
The A-side half-bridge output is designed to the following truth table:
INPUTS
OUTPUTS
DESCRIPTION
RESET
X
X
0
1
1
1
1
PWDN
X
0
1
1
1
1
1
PWM_AP
X
X
X
0
0
1
1
PWM_AM
X
X
X
0
1
0
1
SHUTDOWN
0
1
1
0
1
1
0
OUTPUTA
0 or Hi-Z(1)
Hi-Z
0
0
0
1
0
Shutdown
Power down
Reset
Shutdown
Normal
Normal
Shutdown
(1)Output is 0 for low voltage, overtemperature, and illegal input. Hi-Z is for overcurrent.
The B-side half-bridge output is designed to the following truth table:
INPUTS
PWDN
X
OUTPUTS
DESCRIPTION
RESET
X
PWM_BP
X
PWM_BM
X
SHUTDOWN
0
OUTPUTB
0 or Hi-Z(1)
Shutdown
X
0
X
X
1
Hi-Z
Power down
0
1
X
X
1
0
Reset
1
1
0
0
0
0
Shutdown
1
1
0
1
1
0
Normal
1
1
1
0
1
1
Normal
1
1
1
1
0
0
Shutdown
(1)Output is 0 for low voltage, overtemperature, or illegal input. Hi-Z is for overcurrent.
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