參數(shù)資料
型號： TAS5036BPFC
廠商： Texas Instruments, Inc.
英文描述： Six Channel Digital Audio PWM Precessor
中文描述： 六通道數(shù)字音頻PWM Precessor
文件頁數(shù)： 22/56頁
文件大?。?/td> 713K
代理商： TAS5036BPFC
Architecture Overview
16
SLES073
—
February 2003
TAS5036B
2.2.2 Power Down
—
PDN
The TAS5036B can be placed into the power-down mode by holding the PDN terminal low. When power-down
mode is entered, both the PLL and the oscillator are shut down. Volume is immediately set to full attenuation
(there is no ramp down). The valid 1
–
6 outputs are immediately asserted low and the PWM outputs are placed
in the hard mute state. PDN initiates device power down without clock inputs. As long as the PDN terminal
is held low
—
the device is in the power-down (hard mute) state.
During power down, all I
2
C and serial data bus operations are ignored. Table 2
–
8 shows the device output
signals while PDN is active.
Table 2
–
8. Device Outputs During Power Down
SIGNAL
MODE
SIGNAL STATE
Valid 1
–
Valid 6
All
Low
PWM P-outputs
All
Low
PWM M-outputs
All
Low
MCLKOUT
All
Low
SCLK
Master
Low
SCLK
Slave
Signal input
LRCLK
Master
Low
LRCLK
Slave
Signal input
SDA
All
Signal input
CLIP
All
High
To place the device in total power-down mode, both RESET and power-down modes must be enabled. Prior
to bringing PDN high, RESET must be brought low for a minimum of 50 ns.
Because PDN is an asynchronous control signal, small clicks and pops can be produced during the application
(the leading edge) of this control. However, when PDN is released, the transition from the hard mute state back
to normal operation is performed synchronously using a quiet sequence.
If a completely quiet reset sequence is desired, MUTE should be applied before applying PDN.
2.2.3 General Status Register
The general status register is a read only register. This register provides an indication when a volume update
is in progress or one of the channels is inactive. The device id can be read using this register.
Volume update is in progress
—
Whenever a volume change is in progress due to a volume update
command or mute, this status bit is high.
Device identification code
—
The device identification code 1 0 0 1 1 is displayed.
No internal errors (all valid signals are high)
—
When there are no internal errors in the TAS5036B and all
outputs are valid, this status bit is high.
One or more valid signals are inactive
—
If low, one or more channels of the TAS5036B are not outputting
data. The valid signals for those channels are inactive.
This can be produced by one of three causes:
One or more of the clock signals are in error
ERROR recover is active (low)
The automute has silenced one or more channels that are receiving 0 inputs
MUTE has been set
Volume control has been set to full attenuation
If this signal is high, the TAS5036B is outputting data on all channels.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TAS5036BPFCG4 功能描述:音頻 DSP Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
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TAS5036CPAG 制造商:TI 制造商全稱:Texas Instruments 功能描述:SIX CHANNEL DIGITAL AUDIO PWM PROCESSOR
TAS5036IPFC 功能描述:音頻 DSP Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
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