參數(shù)資料
型號： TAS5036B_06
廠商： Texas Instruments, Inc.
英文描述： Six Channel Digital Audio PWM Processor
中文描述： 六通道數(shù)字音頻PWM處理器
文件頁數(shù)： 34/58頁
文件大?。?/td> 745K
代理商： TAS5036B_06
Serial Control Interface Register Definitions
28
SLES073
—
February 2003
TAS5036B
3.6
Automute Delay Register (x05)
Table 3
–
7. Automute Delay Register
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
0
0
0
-
-
-
-
Unused
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
0
Set automute delay at 5 ms
-
-
-
-
0
0
0
1
Set automute delay at 10 ms
-
-
-
-
0
0
1
0
Set automute delay at 15 ms
-
-
-
-
0
0
1
1
Set automute delay at 20 ms
-
-
-
-
0
1
0
0
Set automute delay at 25 ms
-
-
-
-
0
1
0
1
Set automute delay at 30 ms
-
-
-
-
0
1
1
0
Set automute delay at 35 ms
-
-
-
-
0
1
1
1
Set automute delay at 40 ms
-
-
-
-
1
-
-
0
Set automute delay at 45 ms
-
-
-
-
1
-
-
1
Set automute delay at 50 ms
3.7
DC-Offset Control Registers (x06
–
x0B)
Channels 1, 2, 3, 4, 5, and 6 are mapped into (x06, x07, x08, x09, x0A, and x0B).
Table 3
–
8. DC-Offset Control Registers
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
1
0
0
0
0
0
0
0
Maximum correction for positive dc offset (
–
1.56% FS)
0
0
0
0
0
0
0
0
No dc-offset correction
0
1
1
1
1
1
1
1
Maximum correction for negative dc offset (1.56% FS)
3.8
Interchannel Delay Registers (x0C
–
x11)
Channels 1, 2, 3, 4, 5, and 6 are mapped into (x0C, x0D, x0E, x0F, x10, and x11).
The first channel delay is set at 0. Each subsequent channel has a default value that is 76 DCLKs larger than
the preceding channel.
Table 3
–
9. Six Interchannel Delay Registers
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
0
0
0
0
0
0
0
Minimum absolute delay, 0 DCLK cycles, default for channel 1
0
1
0
0
1
1
0
0
Default for channel 2
1
0
0
1
1
0
0
0
Default for channel 3
1
1
1
0
0
1
0
0
Default for channel 4
0
0
1
1
0
0
0
0
Default for channel 5
0
1
1
1
1
1
0
0
Default for channel 6
1
1
1
1
1
1
1
1
Maximum absolute delay, 255 DCLK cycles
3.9
ABD Delay Register (x12)
Table 3
–
10. ABD Delay Register
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
0
0
-
-
-
-
-
Unused
-
-
-
-
-
-
-
-
-
-
-
0
0
0
0
0
Minimum ABD delay, 0 DLCK cycles
-
-
-
1
0
0
0
1
Default ABD delay, 17 DLCK cycles
-
-
-
1
1
1
1
1
Maximum ABD delay, 31 DLCK cycles
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相關(guān)代理商/技術(shù)參數(shù)
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TAS5036BPFC 功能描述:音頻 DSP Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
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TAS5036BPFCR 功能描述:多媒體雜項(xiàng) Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 類型: 通道數(shù)量: 轉(zhuǎn)換速率:540 Mbps 分辨率: 封裝 / 箱體:SOIC-16 封裝:Tube
TAS5036BPFCRG4 功能描述:多媒體雜項(xiàng) Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 類型: 通道數(shù)量: 轉(zhuǎn)換速率:540 Mbps 分辨率: 封裝 / 箱體:SOIC-16 封裝:Tube
TAS5036CPAG 制造商:TI 制造商全稱:Texas Instruments 功能描述:SIX CHANNEL DIGITAL AUDIO PWM PROCESSOR
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