參數(shù)資料
型號(hào): TAS5028APAGR
廠商: Texas Instruments, Inc.
英文描述: 8 Channel Digital Audio PWM Processor
中文描述: 8通道數(shù)字音頻PWM處理器
文件頁(yè)數(shù): 59/82頁(yè)
文件大小: 1226K
代理商: TAS5028APAGR
Serial Control Interface Register Definitions
54
SLES120
September 2004
TAS5028A
6.4
System Control Register 1 (0x03)
Bit D5, D2, D1, and D0 are
Don’t Care
.
Table 6
4. System Control Register 1
D7
0
1
D6
D5
D4
0
1
D3
D2
D1
D0
FUNCTION
PWM high pass disabled
PWM high pass enabled
Soft unmute on recovery from clock error
Hard unmute on recovery from clock error
6.5
System Control Register 2 (0x04)
Bit D3 and D2 are
Don’t Care
.
Table 6
5. System Control Register 2
D1
D0
Reserved
PWM automute detection enabled
PWM automute detection disabled
8 Ch device input detection automute enabled
8 Ch device input detection automute disabled
Unmute threshold 6 dB over input threshold
Unmute threshold equal to input threshold
0
0
No de-emphasis
0
1
De-emphasis for Fs = 32 kHz
1
0
De-emphasis for Fs = 44.1 kHz
1
1
De-emphasis for Fs = 48 kHz
D7
0
D6
0
1
D5
0
1
D4
0
1
D3
D2
FUNCTION
6.6
Channel Configuration Control Register (0x05
X0C)
Channels 1, 2, 3, 4, 5, 6, 7, and 8 are mapped into 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, and 0x0C.
Bit D0 is
Don’t Care
.
Table 6
6. Channel Configuration Control Registers
D3
D2
D1
D0
Disable backend reset sequence for a channel – BEErrorRecEn
Enable backend reset sequence for a channel
Valid does not have to be low for this channel to be reset BEValidRst
Valid must be low for this channel to be reset
Valid does not have to be low for this channel to be muted BEValidMute
Valid must be low for this channel to be muted
Normal BEPolarity
Switches PWM+ and PWM– and invert audio signal
0
Do not remap output to comply with 5182 interface
1
Remap output to comply with 5182 interface
0
Do not go to low low in mute – BELowMute
1
Go to low-low in Mute
0
Do not remap Hi-Z state to low-low state – BE5111BsMute
1
Remap Hi-Z state to low-low state
D7
0
1
D6
0
1
D5
0
1
D4
0
1
FUNCTION
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