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| 型號(hào)： | T9000 |
| 廠商： | Lineage Power |
| 英文描述： | ISDN Network Termination Node (NTN) Device(ISDN網(wǎng)絡(luò)終端節(jié)點(diǎn)器件) |
| 中文描述： | ISDN網(wǎng)絡(luò)終端節(jié)點(diǎn)（新界西）設(shè)備（ISDN網(wǎng)網(wǎng)絡(luò)終端節(jié)點(diǎn)器件） |
| 文件頁(yè)數(shù)： | 80/126頁(yè) |
| 文件大?。?/td> | 1523K |
| 代理商： | T9000 |
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80
Lucent Technologies Inc.
Advance Data Sheet
April 2000
ISDN Network Termination Node (NTN) Device
T9000
10 GCI+ Interface Module
(continued)
10.7 GCI+ Register Set
(continued)
Table 81. GCOF1: GCI PFS1 Offset Select (0x2F)
Table 82. GCOF2: GCI PFS2 Offset Select (0x30)
Reg
GCOF1
RESET
R/W
R/W
Default
Bit 7
GTMODE G_R_LBK G_L_LBK
0
0
Bit 6
Bit 5
Bit 4
OFF14
0
Bit 3
OFF13
0
Bit 2
OFF12
0
Bit 1
OFF11
0
Bit 0
OFF10
0
0
Bit #
7
Symbol
GTMODE
Name/Description
GCI Time-Out Mode. (Only Applicable on GCI-NT and GCI-TE Operation Modes.)
Enables the GCI time-out mechanism.
0: Time-out mechanism disabled.
1: Time-out mechanism enabled (abort after three TNR or RNRs), (0.5 ms since the
beginning of transmission).
GCI Remote Loopback.
6
G_R_LBK
0: Normal operation.
1: Upstream B1- and B2-channel data on the GCI is internally looped back to the
downstream GCI. Loopback is transparent, except when G_L_LBK is asserted at
the same time.
GCI Local Loopback.
0: Normal operation.
1: Downstream B1- and B2-channel data on the GCI is internally looped back to the
upstream GCI. Loopback is transparent, except when G_R_LBK is asserted at the
same time.
Offset of PS1.
Determines the number of channel slots by which PFS1 (B1 channel) is
offset from the first time slot of the frame.
5
G_L_LBK
4—0
OFF1[4:0]
Reg
GCOF2
RESET
R/W
R/W
Default
Bit 7
Bit 6
Bit 5
—
0
Bit 4
OFF24 OFF23 OFF22 OFF21 OFF20
0
0
0
Bit 3
Bit 2
Bit 1
Bit 0
U_FORCE_B2DN U_FORCE_B1DN
0
0
0
0
Bit #
7
Symbol
Name/Description
U_FORCE_B2DN
Microcontroller Access to Downstream B2 Channel.
When this bit is set, the
microcontroller can access the downstream B2-channel data from the U-interface to
the GCI via the register B2DN (0x54) assuming that DFR[B2_SEL] = 1 and
ECR0[LB2] = 0.
U_FORCE_B1DN
Microcontroller Access to Downstream B1 Channel.
When this bit is set, the
microcontroller can access the downstream B1-channel data from the U-interface to
the GCI via the register B1DN (0x53) assuming that DFR[B1_SEL] = 1 and
ECR0[LB1] = 0.
—
Reserved.
Program to 0.
OFF2[4:0]
OFFSET of PFS2.
Determines the number of time slots by which PFS2 (B2-channel)
is offset from the first time slot of the frame.
6
5
4—0
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