- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383876 > T8531A (Lineage Power) Tone Processing(音調(diào)處理器件) PDF資料下載
參數(shù)資料
| 型號： | T8531A |
| 廠商： | Lineage Power |
| 英文描述： | Tone Processing(音調(diào)處理器件) |
| 中文描述： | 音處理（音調(diào)處理器件） |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 338K |
| 代理商： | T8531A |
Lucent Technologies Inc.
5
User Manual
September 2000
T8531 and T8531A Tone Processing
DTMF Detection
Overview
DTMF signaling defines pairs of tones used to signal digits 0 through 9, pound (#), star (*), A, B, C, and D. For
each pair, one of the tones is selected from a low group of four frequencies (697, 770, 852, 941 Hz), and the other
from a high group of four frequencies (1209, 1336, 1477, 1633 Hz). The correct detection of a digit requires both a
valid tone pair and the correct timing intervals.
5-8990(F)
Figure 3. DTMF Signaling
DTMF Detection Operation
The DTMF detection algorithm meets the requirements of the Telcordia Signaling for Analog Interfaces specifica-
tion (GR-506-CORE). This algorithm continuously scans for digits 1 through 9, *, #, and A through D. The algorithm
executes when a particular TX ac routine control word is loaded with the memory address of the DTMF detection
routine. The algorithm is terminated by changing the TX ac address to the TX path inactive routine.
The host is required to poll the seventh word in the per time-slot tone processing control area (starting at 0x600) to
obtain the results of the DTMF detector. For example, the host would poll address 0x627 to read the results of the
DTMF detector executing for time slot 2. The host needs to clear the V bit (or simply the address) after every poll.
In order to capture all digits, the host needs to poll at a rate less than 80 ms. The address map for the DTMF detec-
tor result is shown in Table 3.
Table 3. DTMF Detector Control Words
Address
Size
1 word
Function
0x0607, 0x0617, . . . 0x06F7
DTMF detection result for time slot 0, 1 . . . 15
1
2
3
4
5
6
7
8
9
*
0
#
A
B
C
D
1209 H
Z
1336 H
Z
1477 H
Z
1633 H
Z
697 H
Z
770 H
Z
852 H
Z
941 H
Z
TELEPHONE
KEYPAD
HIGH-FREQUENCY GROUP
LOW-FREQUENCY
GROUP
相關PDF資料 |
PDF描述 |
|---|---|
| T8532 | Multichannel Programmable Codec Chip Set(多通道可編程編解碼器芯片組) |
| T8534 | Quad Programmable Line Card Signal Processor(四通道可編程線卡信號處理器) |
| T8533 | Quad Programmable Line Card Signal Processor(四通道可編程線卡信號處理器) |
| T8535A | Quad Programmable Codec Chip Set(四通道可編程編解碼器芯片組) |
| T8536A | Quad Programmable Codec Chip Set(四通道可編程編解碼器芯片組) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| T8532 | 制造商:AGERE 制造商全稱:AGERE 功能描述:T8531A/8532 Multichannel Programmable Codec Chip Set |
| T8533 | 制造商:AGERE 制造商全稱:AGERE 功能描述:T8533/34 Quad Programmable Line Card Signal Processor |
| T85331G | 制造商:BITECH 制造商全稱:Bi technologies 功能描述:Thick Film Super Low Profile SIP Resistor Networks |
| T85331J | 制造商:BITECH 制造商全稱:Bi technologies 功能描述:Thick Film Super Low Profile SIP Resistor Networks |
| T8534 | 制造商:AGERE 制造商全稱:AGERE 功能描述:T8533/34 Quad Programmable Line Card Signal Processor |
發(fā)布緊急采購，3分鐘左右您將得到回復。