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參數(shù)資料
| 型號(hào)： | SYM53C1010R |
| 廠商： | LSI Corporation |
| 英文描述： | PCI-Dual Channel Ultra160 SCSI Controller(PCI-雙通道Ultra160 SCSI控制器) |
| 中文描述： | 的PCI -雙通道Ultra160 SCSI控制器（個(gè)PCI -雙通道Ultra160的的SCSI控制器） |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 178K |
| 代理商： | SYM53C1010R |
Ultra160 SCSI Features
Double transition clocking enables throughput of up to 160 MBps on each
channel for a total of 320 MBps, without increasing the interface clock rate.
Cyclic Redundancy Check (CRC) improves the reliability of SCSI data trans-
mission through enhanced detection of communication errors. CRC provides
extra data protection for marginal cable plants and external devices. CRC is the
best way to ensure data protection during hot plugging. It uses the same proven
CRC algorithm used by FDDI, Ethernet, and Fibre Channel, and detects all
single bit errors, all double bit errors, all odd number of errors, and all burst errors
up to 32 bits long. To provide complete end-to-end protection of the SCSI I/O,
AIP protects all non-data phases, augmenting the CRC feature of Ultra160.
SureLINK domain validation technology detects the configuration of the SCSI
bus and automatically tests and adjusts the SCSI transfer rate to optimize inter-
operability. The SYM53C1010R exceeds Ultra160 by providing not only Basic
(Level 1) and Enhanced (Level 2) domain validation, but adds Margined
(Level 3) domain validation. This enhancement margins LVD drive strength
and clock signal timing characteristics to identify marginal Ultra160 systems.
Hardware/Software Overview
PCI Interface
The host PCI interface complies with PCI Local Bus Specification Revision 2.2,
and implements a 64-bit/66 MHz PCI bus. It is backward compatible with
32-bit/33 MHz buses. Additionally, support for DAC is provided.
The SYM53C1010R is a true PCI multifunction device in that it presents one
electrical load to the PCI bus. It uses one REQ/-GNT/pair to arbitrate for PCI
bus mastership, and separate interrupt signals are generated for SCSI Function A
and SCSI Function B for maximum performance.
The SYM53C1010R complies with PCI Power Management Interface
Specification Revision 1.1 and PC 99, supporting power states D0, D1, D2,
D3hot and D3cold, power management capabilities registers, and programmable
values for PCI Subsystem Vendor ID and Subsystem ID. Extended access cycles
(Memory Read Line, Memory Read Multiple, and Memory Write and Invalidate)
are also supported.
SCSI Processors
The SYM53C1010R provides two independent Ultra160 SCSI controllers on a
single chip. Each controller supports wide Ultra160 SCSI synchronous transfer
rates up to 160 MBps on a LVD SCSI bus. Integrated LVDlink
transceivers
support both LVD and single-ended signals with no external transceivers
Symbios SYM53C1010R Controller
Features
Pin compatible with SYM53C1030
Ultra320 controller
Functionally identical to SYM53C1010
Ultra160 controller
No external memory required
64-bit,33/66 MHz PCI interface
Theoretical 528 MBps (on 66 MHz part)
zero wait state transfer rate
64-bit addressing supported through
Dual Address Cycle (DAC)
Compliant with PCI 2.2,PCI Power
Management 1.1 and PC99
Supports Ultra160 SCSI
Double transition clocking for
160 MBps throughput on each channel
Cyclic Redundancy Check
Domain validation
Asynchronous Information Protection
Covers all non-data,including command,
status and messages
High-performance PCI
multifunction device
Presents one electrical load to PCI bus
Two independent wide Ultra160
SCSI channels
SCSI Interrupt Steering Logic (SISL)
alternate interrupt routing for
RAID applications
Supports Nextreme RAID
相關(guān)PDF資料 |
PDF描述 |
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| SYM53C1010 | PCI-Single Channel Ultra160 SCSI Controller(PCI-單通道Ultra160 SCSI控制器) |
| SYM53C120 | SCSI Bus Expander(SCSI總線擴(kuò)展器) |
| SYM53C140 | Ultra2 SCSI Bus Expander(Ultra2 SCSI總線擴(kuò)展器) |
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| SYM53C180 | Ultra3 SCSI Bus Expander(Ultra2 SCSI總線擴(kuò)展器) |
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