- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385894 > SYM53C040 (LSI Corporation) An Enclosure Services Processor With Programmable,Multipurpose IO (MPIO) pins For Enclosure Monitoring，24 Programmable, Multipurpose IO pins For Visual LED Indicators(MPLED)(外圍設備服務處理器（帶可編程多功能接口引腳，24個可編程多功能可視LED指示引腳）) PDF資料下載
參數(shù)資料
| 型號： | SYM53C040 |
| 廠商： | LSI Corporation |
| 英文描述： | An Enclosure Services Processor With Programmable,Multipurpose IO (MPIO) pins For Enclosure Monitoring，24 Programmable, Multipurpose IO pins For Visual LED Indicators(MPLED)(外圍設備服務處理器（帶可編程多功能接口引腳，24個可編程多功能可視LED指示引腳）) |
| 中文描述： | 一個箱體服務處理器，可編程，多用途木衛(wèi)一（MPIO）的引腳設備監(jiān)控，24個可編程，多用途木衛(wèi)一對于Visual LED指示燈（MPLED）（外圍設備服務處理器引腳（帶可編程多功能接口引腳，24個可編程多功能可視的LED指示引腳）） |
| 文件頁數(shù)： | 3/4頁 |
| 文件大小： | 185K |
| 代理商： | SYM53C040 |
3
Microcontroller
SYM53C80
SFF8067
Mode Control
& Logic
Primary
I
2
C
Interface
MPIO
Register Set
SRAM
Secondary
I
2
C
Interface
External Firmware and
I
2
C peripheral devices
External Control
to/from sensors,
LEDs, etc.
SFF-8067
bidirectional
Interface
LVD or SE
SCSI Bus
Controller
Interface
External Firmware and
I
2
C peripheral devices
Figure 3: SYM53C040 block diagram
Figure 3 shows the functional block diagram for the
SYM53C040. In order to achieve functionality and
flexibility, the SYM53C040 incorporates an integrated
SYM53C80 SCSI protocol controller, a MCS-51 family
compatible micro controller, internal Static RAM, two 2
wire serial interfaces and multi-purpose I/O registers
connected to the MPIO and MPLED pins. Below is a
brief description of each element.
SYM53C80:
The SYM53C80 is an 8-bit asynchronous SCSI core
which supports ultra SCSI speeds. The core contains
support for a DMA interface and additional support for
micro controller interrupts. The SYM53C040 uses the
dedicated DMA interface and MCS
51 micro controller
for memory accesses to/from the SCSI core.
Micro Controller:
The micro controller is an 8-bit Intel MCS
51 compatible
device. The micro controller is operated with a 20 MHz
CPU clock in the SYM53C040 derived from the 40 MHz
ESP system clock. This micro controller uses a shared
address/data bus and can address either 64K of shared
program and data memory or 64 K each of separate
program and data memory spaces.
2 Wire Serial Interfaces:
The SYM53C040 has two 2 wire Serial Interface blocks.
Access to external serial EEPROM storage and any other
user-defined 2 wire peripheral devices is provided by the 2
wire Serial Interface blocks. As a default, the SYM53C040
will attempt to download from an external serial
configuration ROM through one 2 wire interface at
power-on or after a reset.
MPIO Banks:
The SYM53C040 provides up to 28 separate multi-
purpose I/O (MPIO) signal pins and 24 multi-purpose
LED (MPLED) pins. For design flexibility, the MPLED
pins can, if desired, be used as additional multi-purpose
I/O pins. The I/O pins are firmware programmable to
configure the SYM53C040 to meet many possible
monitoring combinations. As a result, numerous configur-
ations of drives, fans, and power supplies can be supported
given the total number of MPIO and MPLED pins.
SFF-8067 Mode Control & Logic Interface:
This mode is a configuration option determined at power
on. In operation, the SFF-8067 interface is used instead
of the SCSI interface. A transfer sequence is initiated
upon assertion of Parallel_ESI by the drive. The host
initiates all read and write operations. The drive does not
initiate any activity, but does control the bi-directional
interface. The back plane uses SEL_N to specify the loop
identifier for the drive.
Figure 4: Functional signal grouping
Technical Information
Firmware protocol:
Monitoring capability:
SAF-TE, SES
28 programmable MPIO pins
24 programmable MPLED pins
40 MHz
160 Plastic Quad Flat Pack (PQFP)
169 Plastic Ball Grid Array (PBGA)
SYM53C120 (SE to SE or SE to HVD)
SYM53C141 (SE to SE or SE to LVD)
For electrical and logical
isolation of SCSI Bus segments
Input clock:
Package:
Complementary
products:
SEL/P
SEL/M
BSY/P
BSY/M
RST/P
RST/M
REQ/P
REQ/M
ACK/P
ACK/M
MSG/P
MSG/M
C/D/P
C/D/M
I_O/P
I_O/M
ATN/P
ATN/M
SDP0P
SDP0M
SD[7-0]P
SD[7-0]M
Diffsens
SHID[2:0]/P
SHID[2:0]/M
RBIASMP
RBIASMM
L
MPIO0[7:0]
MPIO1[7:0]
MPIO2[7:0]
MPIO3[3:0]
MPIO
Bank
I
2
C Bus
(primary)
80C32 8-bit
Controller
Interface
P_SCL
P_SDA
AD[7:0]
Addr[15:8]
ALE/
PSEN/
WR/
RD/
TCK
TMS
TDI
TDO
TRST
JTAG
MPLED0[7:0]
MPLED1[7:0]
MPLED2[7:0]
MPLED
Bank
I
2
C Bus
(secondary)
S_SCL
S_SDA
S
S
P
S
The SFF-8067 pins are muxed with the LVD SCSI pins
AL_PA[6:0]
Parallel_ESI/
SEL_6/-DSK_WR
SEL_5/-DSK_RD
SEL_4/-ENCL_ACK
SEL_3/D(3)
SEL_2/D(2)
SEL_1/D(1)
SEL_0/D(0)
AL_PA[6:0]
Parallel_ESI/
SEL_6/-DSK_WR
SEL_5/-DSK_RD
SEL_4/-ENCL_ACK
SEL_3/D(3)
SEL_2/D(2)
SEL_1/D(1)
SEL_0/D(0)
相關PDF資料 |
PDF描述 |
|---|---|
| SYM53C1000R | PCI-Single Channel Ultra160 SCSI Controller(PCI-單通道Ultra160 SCSI控制器) |
| SYM53C1000 | Highly Integrated PCI-Single Channel Ultra160SCSI Controller(高度集成PCI-單通道Ultra160SCSI控制器) |
| SYM53C1010-33 | PCI to Dual Channel Ultra3 SCSI Multifunction Controller(PCI與雙通道Ultra3 SCSI連接的多功能控制器) |
| SYM53C1010R | PCI-Dual Channel Ultra160 SCSI Controller(PCI-雙通道Ultra160 SCSI控制器) |
| SYM53C1010 | PCI-Single Channel Ultra160 SCSI Controller(PCI-單通道Ultra160 SCSI控制器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SYM53C040(PBGA) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| SYM53C040(PQFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| SYM53C1010 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| SYM53C141 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| SYM53C400A | 制造商:SYMBIOS 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。