參數(shù)資料
型號: SY89830U
廠商: Micrel Semiconductor,Inc.
英文描述: 2.5V/3.3/5V 2.5GHz 1:4 PECL/ECL CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
中文描述: 2.5V/3.3/5V 2.5GHz的1:4 PECL的/ ECL時鐘驅(qū)動器,2:1差分輸入復用器
文件頁數(shù): 9/10頁
文件大?。?/td> 125K
代理商: SY89830U
9
Precision Edge
SY89830U
Micrel
M9999-111794
hbwhelp@micrel.com or (408) 955-1690
TERMINATION RECOMMENDATIONS
R2
82
R2
82
Z
O
= 50
Z
O
= 50
+3.3V
+3.3V
V
t
= V
CC
2V
R1
130
R1
130
+3.3V
Figure 1. Parallel Termination
Thevenin Equivalent
Notes:
1. For +2.5V systems:
R1 = 250
R2 = 62.5
2. For +5.0V systems:
R1 = 82
R2 = 130
Z = 50
Z = 50
50
50
50
+3.3V
+3.3V
source
destination
(Optional)
C1
0.01
μ
F
Rb
Figure 2. Three-Resistor
Y
Termination
Notes:
1. Power-saving alternative to Thevenin termination.
2. Place termination resistors as close to destination inputs as possible.
3. R
b
resistor sets the DC bias voltage, equal to V
t
. For +3.3V systems R
b
= 46
to 50
. For +5V systems, R
b
= 110
.
4. C1 is an optional bypass capacitor intended to compensate for any tr/tf mismatches.
+3.3V
+3.3V
Z
O
= 50
R2
82
+3.3V
+3.3V
R1
130
R1
130
R2
82
V
t
= V
CC
2V
Q
/Q
R3
1k
R4
1.6k
V
t
= V
CC
1.3V
Figure 3. Terminating Unused I/O
Notes:
1. Unused output (/Q) must be terminated to balance the output.
2. For +2.5V systems: R1 = 250
, R2 = 62.5
, R3 = 1.25k
, R4 = 1.2k
.
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