參數(shù)資料
型號: SY89429
廠商: Micrel Semiconductor,Inc.
英文描述: 5V/3.3V PROGRAMMABLE FREQUENCY SYNTHESIZER 25MHz to 400MHz
中文描述: 5V/3.3V可編程頻率合成25MHz至400MHz的
文件頁數(shù): 3/9頁
文件大?。?/td> 140K
代理商: SY89429
3
ClockWorks
SY89429A
Micrel
INPUTS
XTAL1, XTAL2
These pins form an oscillator when connected to an external
crystal. The crystal is series resonant. Alternatively, these
pins can be driven with 100K PECL level by an external
source.
S_
LOAD
This TTL pin loads the configuration latches with the contents
of the shift registers. The latches will be transparent when this
signal is HIGH; thus, the register data must be stable on the
HIGH-to-LOW transition of S_
LOAD
for proper operation.
S_
DATA
This TTL pin is the input to the serial configuration shift
registers.
S_
CLOCK
This TTL pin clocks the serial configuration shift registers. On
the rising edge of this signal, data from S_
DATA
is sampled.
P_
LOAD
This TTL pin loads the configuration latches with the contents
of the parallel inputs. The latches will be transparent when this
signal is LOW; thus, the parallel data must be stable on the
LOW-to-HIGH transition of P_
LOAD
for proper operation.
M[8:0]
These TTL pins are used to configure the PLL loop divider.
They are sampled on the LOW-to-HIGH transition of P_
LOAD
.
M[8] is the MSB, M[0] is the LSB. The binary count on the M
pins equates to the divide-by value for the PLL.
N[1:0]
These TTL pins are used to configure the output divider
modulus. They are sampled on the LOW-to-HIGH transition
of P_
LOAD
.
OUTPUTS
FOUT, FOUT
These differential positive-referenced ECL signals (PECL)
are the output of the synthesizer.
TEST
The function of this TTL output is determined by the serial
configuration bits T[2:0].
POWER
V
CC1
This is the positive supply for the chip and is normally connected
to +5.0V.
V
CC_OUT
This is the positive reference for the PECL outputs, FOUT and
FOUT. It is constrained to be less than or equal to
VCC1
.
V
CC_QUIET
This is the positive supply for the PLL and should be as noise-
free as possible for low-jitter operation.
GND
These pins are the negative supply for the chip and are
normally all connected to ground.
OTHER
LOOP_FILTER
This is an analog I/O pin that provides the loop filter for the
PLL.
LOOP_REF
This is an analog I/O pin that provides a reference voltage for
the PLL.
PIN DESCRIPTIONS
N[1:0]
Output Division
0 0
2
0 1
4
1 0
8
1 1
16
相關(guān)PDF資料
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SY89429V 5V/3.3V PROGRAMMABLE FREQUENCY SYNTHESIZER 25MHz to 400MHz
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