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參數(shù)資料
| 型號： | SY89425 |
| 廠商： | MICREL INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Dual Sonet OC-12 Clock Synthesizer(雙鎖相環(huán)時鐘合成器（由兩個Sonet兼容時鐘發(fā)生器組成）) |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 93K |
| 代理商： | SY89425 |
3
ClockWorks
SY89425
Micrel
INPUTS
RFCKB [Reference Clock B]
TTL
Reference clock in for PLL B. (38.88, 51.84 or 77.76MHz).
SEL39B [38.88MHz Select B]
TTL
Logic HIGH on this pin denotes a 38.88MHz input reference
clock for PLL B. Tie to logic LOW if input is not 38.88MHz.
SEL78B [77.76MHz Select B]
TTL
Logic HIGH on this pin denotes a 77.76MHz input reference
clock for PLL A. Tie to logic LOW if input is not 77.76MHz.
RSTB [Reset B]
TTL
Tie to logic LOW for normal operation; logic HIGH forces reset
of internal Phase Detector & feedback dividers on PLL B.
FLTRBP, FLTRBN (Loop Filter B, Pos & Neg)
Analog.
Connect a series RC loop filter between these pins. The
suggested loop filter is 0.1
μ
F and 500 ohms, as shown in the
typical application on page 3-9.
RSTA (Reset A)
TTL
Tie to logic LOW for normal operation; logic HIGH forces reset
of internal Phase Detector & feedback dividers on PLL A.
SEL78A [77.76MHz Select A]
TTL
Logic HIGH on this pin denotes a 77.76MHz input reference
clock for PLL A. Tie to logic LOW if input is not 77.76MHz.
SEL39A [38.88MHz Select A]
TTL
Logic HIGH on this pin denotes a 38.88MHz input reference
clock for PLL A. Tie to logic LOW if input is not 38.88MHz.
PIN DESCRIPTION
REFCKA [Reference Clock A]
TTL
Reference clock in for PLL A.
FLTRAP, FLTRAN (Loop Filter A, Pos & Neg)
Analog.
Connect a series RC loop filter between these pins. The
suggested loop filter is 0.1
μ
F and 500 ohms, as shown in the
typical application on page 5-527.
OUTPUTS
CK622BP, CK622BN (Clock Out B)
Differential PECL
622.08MHz output clock from PLL B.
CK622AP, CK622AN (Clock Out A)
Differential PECL
622.08MHz output clock from PLL A.
POWER & GROUND
V
CCA
V
CCB
V
CCOA
V
CCOB
GND
+5V for PLL A.
+5V for PLL B.
+5V for PLL A PECL outputs.
+5V for PLL B PECL outputs.
Ground (0 volts)
REFERENCE FREQUENCY SELECTION
SEL39
SEL78
fRFCK
0
0
51.84
0
1
77.76
1
0
38.88
1
1
77.76
Symbol
Parameter
Rating
Unit
V
CC
Power Supply
0 to +7
V
V
I
Input Voltage
0 to V
CC
V
I
OUT
Output Current
–
Continuous
–
Surge
50
100
mA
T
A
Operatimg Temperature Range
0 to +85
°
C
°
C
T
Storage Temperature Range
–
65 to +150
NOTE:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATING conditions
for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
(1)
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| SY89425JCTR | DUAL SONET OC-12 CLOCK SYNTHESIZER |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SY89425JC | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:DUAL SONET OC-12 CLOCK SYNTHESIZER |
| SY89425JCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:DUAL SONET OC-12 CLOCK SYNTHESIZER |
| SY89425VJC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| SY89425VJCTR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| SY89426 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:SONET OC-12/OC-3 CLOCK SYNTHESIZER |
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