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參數(shù)資料
| 型號(hào)： | SY58025UMITR |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION |
| 中文描述： | 58025 SERIES, DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, QCC32 |
| 封裝： | 5 X 5 MM, MLF-32 |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大小： | 234K |
| 代理商： | SY58025UMITR |
5
Precision Edge
SY58025U
Micrel, Inc.
M9999-020207
hbwhelp@micrel.com or (408) 955-1690
V
CC
= 2.5V
±
5% or 3.3V
±
10%; T
A
=
–
40
°
C to +85
°
C; R
L
= 100
across each output pair, or equivalent, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
f
MAX
Maximum Operating Frequency
NRZ Data
10.7
Gbps
V
OUT
≥
200mV
Clock
6
GHz
t
pd
Propagation Delay
IN-to-Q
SEL-to-Q
140
100
290
400
ps
ps
t
SKEW
Input-to-Input Skew (Within-Bank)
Note 9
3
15
ps
Bank-to-Bank Skew
Note 10
5
20
ps
Part-to-Part Skew
Note 11
100
ps
t
JITTER
Data
Random Jitter (RJ)
Note 12
1
ps
RMS
ps
PP
ps
RMS
ps
PP
Deterministic Jitter (DJ)
Note 13
10
Clock
Cycle-to-Cycle Jitter
Note 14
1
Total Jitter (TJ)
Note 15
10
Crosstalk-Induced Jitter
Channel-to-Channel
Note 16,
Within-bank.
0.7
ps
RMS
ps
t
r
, t
f
Output Rise/Fall Time 20% to 80%
At full swing.
20
50
70
Notes:
8. High-speed AC parameters are guaranteed by design and characterization. V
IN
swing
≥
100mV unless otherwise noted.
9. Input-to-input skew is the difference in time between two inputs to the output within a bank.
10. Bank-to-bank skew is the difference in time from input to the output between bank.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
respective inputs.
12. Random jitter is measured with a K28.7 comma detect character pattern, measured at 10.7Gbps and 2.5Gbps/3.2Gbps.
13. Deterministic jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 2
23
–
1 PRBS pattern
14. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T
n
–
T
n
–
1
where T is the time between rising edges of the output
signal.
15. Total jitter definition: with an ideal clock input of frequency
≤
f
MAX
, no more than one output edge in 10
12
output edges will deviate by more than the
specified peak-to-peak jitter value.
16. Crosstalk is measured at the output while applying two similar frequencies that are asynchronous with respect to each other at the inputs.
AC ELECTRICAL CHARACTERISTICS
(8)
TRUTH TABLES
INA0
0
1
X
X
/INA0
1
0
X
X
INA1
X
X
0
1
/INA1
X
X
1
0
SELA
0
0
1
1
QA
0
1
0
1
/QA
1
0
1
0
INB0
0
1
X
X
/INB0
1
0
X
X
INB1
X
X
0
1
/INB1
X
X
1
0
SELB
0
0
1
1
QB
0
1
0
1
/QB
1
0
1
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY58026U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:ULTRA PRECISION DUAL 2:1 LVPECL MUX WITH INTERNAL TERMINATION |
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| SY58026UMG | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 10.7Gbps Dual 2:1 800mV LVPECL Multiplexer (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY58026UMG TR | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 10.7Gbps Dual 2:1 800mV LVPECL Multiplexer (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY58026UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:ULTRA PRECISION DUAL 2:1 LVPECL MUX WITH INTERNAL TERMINATION |
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