參數(shù)資料
型號(hào): SY58025U_07
廠商: Micrel Semiconductor,Inc.
英文描述: ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
中文描述: 超精密雙2:1復(fù)用器慢性骨髓性白血病與內(nèi)部的I / O終止
文件頁數(shù): 2/11頁
文件大?。?/td> 234K
代理商: SY58025U_07
2
Precision Edge
SY58025U
Micrel, Inc.
M9999-020207
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
Pin Number
Pin Name
Pin Function
25, 28,
29, 32,
1, 4,
5, 8
INA0, /INA0,
INA1, /INA1,
INB0, /INB0,
INB1, /INB1
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs
accept AC- or DC-coupled differential signals as small as 100mV. Each pin of a pair
internally terminates to a V
T
pin through 50
. Note that these inputs will default to an
indeterminate state if left open. Unused differential input pairs can be terminated by
connecting one input to V
CC
and the complementary input to GND through a 1k
resistor.
The VT pin is to be left open in this configuration. Please refer to the
Input Interface
Applications
section for more details.
26, 30, 2, 6
VTA0 , VTA1,
VTB0, VTB1
Input Termination Center-Tap: Each side of the differential input pair, terminates to a VT
pin. Each V
T
pin provides a center-tap to a termination network for maximum interface
flexibility. See
Input Interface Applications
section for more details.
18, 15
SELA, SELB
Bank A, Bank B Input Channel Select (TTL/CMOS): These TTL/CMOS-compatible inputs
select the inputs to the multiplexers. These inputs are internally connected to a 25k
pull-up resistor and will default to a logic HIGH state if left open. Input switching threshold
is V
CC
/2.
Reference Output Voltage: These outputs bias to V
CC
1.2V. Connect to the VT pin when
AC-coupling the data inputs. Bypass with 0.01
μ
F low ESR capacitor to V
CC
. Maximum
current source or sink is 0.5mA. See
Input Interface Applications
section.
27, 31, 3, 7
VREF-ACA0,
VREF-ACA1,
VREF-ACB0,
VREF-ACB1
10, 13, 16,
17, 20, 23
VCC
Positive Power Supply: Bypass with 0.1
μ
F
0.01
μ
F low ESR capacitors.
22, 21,
12, 11
QA, /QA,
QB, /QB
Differential CML Outputs: MUX A and MUX B selected CML outputs. See
Output
Interface Applications
section for termination. Refer to the
Truth Table
for logic
operation.
9, 24
GND,
Ground: Ground pin and exposed pad must be connected to the same ground plane.
Exposed pad
14, 19
NC
Not connected.
PIN DESCRIPTION
24
23
22
21
20
19
18
17
GND
VCC
QA
/QA
VCC
NC
SELA
VCC
INB0
VTB0
VREF-ACB0
/INB0
INB1
VTB1
VREF-ACB1
/INB1
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
/
I
V
V
I
V
V
I
V
Q
/
V
G
N
S
V
32-Pin MLF
(MLF-32)
Ordering Information
(1)
Package
Type
MLF-32
MLF-32
MLF-32
Operating
Range
Industrial
Industrial
Industrial
Package
Marking
SY58025U
SY58025U
SY58025Uwith
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Pb-Free
NiPdAu
Part Number
SY58025UMI
SY58025UMITR
(2)
SY58025UMG
(3)
SY58025UMGTR
(2, 3)
MLF-32
Industrial
SY58025U with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25
°
C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
相關(guān)PDF資料
PDF描述
SY58025U ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
SY58025UMG ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
SY58025UMGTR ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
SY58025UMI ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
SY58025UMITR ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
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