參數(shù)資料
型號(hào): SY10EP58VZITR
廠商: MICREL INC
元件分類(lèi): 通用總線(xiàn)功能
英文描述: 3.3V/5V 3GHz PECL/ECL 2:1 MULTIPLEXER
中文描述: 10E SERIES, 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO8
封裝: SOIC-8
文件頁(yè)數(shù): 5/9頁(yè)
文件大?。?/td> 835K
代理商: SY10EP58VZITR
5
ECL Pro
SY10EP58V
SY100EP58V
Micrel, Inc.
M9999-070105
hbwhelp@micrel.com or (408) 955-1690
T
A
= –40
°
C
Typ.
T
A
= +25
°
C
Typ.
T
A
= +85
°
C
Typ.
Symbol
f
MAX
t
PLH
t
PHL
t
SKEW
t
JITTER
Parameter
Min.
3
Max.
Min.
3
Max.
Min.
3
Max.
Unit
GHz
Condition
Max. Toggle Frequency
(1)
Propagation Delay (Differential)
SEL to Q, /Q; D to Q, /Q
Part-to-Part Skew
(2)
Cycle-to-Cycle Jitter (rms)
(3)
Random Jitter
(4)
Deterministic Jitter
(5)
170
0.2
380
200
<1
190
230
0.2
410
200
<1
<1
210
0.2
420
200
<1
ps
ps
ps
PP
ps
PP
Note 3
@1.25Gbps
@2.5Gbps
Total Jitter
(6)
150
<1
800
150
7
10
<1
800
140
<15
<25
1200
180
150
<1
800
ps
PP
Note 4
ps
PP
mV
ps
V
IN
t
r
,
t
f
Differential Input Voltage Range
Output Rise/Fall Time Q, /Q
(20% to 80%)
1200
170
1200
200
Notes:
1. Measured with 750mV input signal, 50% duty cycle. Output swing
400mV. All loading with a 50
to V
CC
–2.0V.
2. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are
measured from the cross point of the inputs to the cross point of the outputs.
3. The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. t
JITTER_CC
= t
n
– t
n
+ 1, where t is the time between
rising edges of the output signal.
4. Random jitter is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 2.5Gbps.
5. Deterministic jitter is measured at 1.25Gbps and 2.5Gbps, with both K28.5 and 2
23
–1 PRBS pattern.
6. Total Jitter is defined as an ideal clock input, no more than 1 output edge in 10
12
output edges will deviate by more than specifed peak-to-peak jitter
value.
AC ELECTRICAL CHARACTERISTICS
V
CC
= 3.0V to 5.5V, V
EE
= 0V or V
CC
= 0V; V
EE
= –3.0V to –5.5V.
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