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參數(shù)資料
| 型號： | SY100EP56VK4I |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V/5V PECL/ECL 3GHz DUAL DIFFERENTIAL 2:1 MULTIPLEXER |
| 中文描述： | 100E SERIES, DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 479K |
| 代理商： | SY100EP56VK4I |
2
ECL Pro
SY100EP56V
Micrel, Inc.
M9999-120505
hbwhelp@micrel.com or (408) 955-1690
PIN DESCRIPTION
Pin
Pin Number
Function
D0a, /D0a
D0b, /D0b
1, 2,
4, 5
Channel 0 PECL/ECL differential signal inputs. Multiplexing of these two differential inputs is
controlled by SEL0, or COM_SEL. The signal inputs include internal 75k
pull-down resistors.
Default condition is LOW when left floating. The input signal should be terminated externally.
See “Termination” section
D1a, /D1a
D1b, /D1b
6, 7
9, 10
Channel 1 PECL/ECL differential signal inputs. Multiplexing of these two differential inputs is
controlled by SEL1, or COM_SEL. The signal inputs include internal 75k
pull-down resistors.
Default condition is a logic LOW when left floating. The input signal should be terminated
externally. See “Termination” section
VBB0, VBB1
3, 8
Channel 0 and Channel 1 reference output voltage. This reference is typically used to bias the
unused inverting input for single-ended input applications, or as the termination point for AC–
coupled differential input applications. V
BB
reference value is approximately V
CC
–1.4V, and tracks
V
CC
1:1. Maximum sink/source capability is 0.50mA. For single ended PECL inputs, connect to
the unused input through a 50
resistor. Decouple the V
BB
pin with a 0.01
μ
F capacitor. For PECL/
LVPECL inputs, the decoupling capacitor is connected to V
CC
, since PECL signals are referenced
to V
CC
. Leave floating if not used.
Negative Power Supply: For PECL/LVPECL applications, connect to GND.
VEE
11
/Q1, Q1
12, 13
Channel 1 100KEP PECL/ECL compatible differential output. PECL/ECL termination is with a 50
resistor to V
CC
–2V. Unused output pairs may be left floating. Unused single-ended outputs must
have a balanced load. For AC-coupled applications, the output stage emitter follower must have a
DC current path to ground. See “Termination” section.
SEL1, SEL0
15, 17
100KEP PECL/ECL compatible Channel 1 and Channel 0 MUX select control. See “MUX Select
Truth Table” Each pin includes an internal 75k
pull-down resistor. Default condition when left
floating is LOW.
COM_SEL
16
100KEP PECL/ECL compatible Channel 1 and Channel 0 Common MUX select control. This is
the common select control pin for both Channels 0 and 1. Includes an internal 75k
pull-down
resistor. Default condition when left floating is LOW. Leave floating when not used.
/Q0, Q0
18, 19
Channel 0 100K EP PECL/ECL compatible differential output. PECL/ECL termination is with a
50
resistor to V
CC
–2V. Unused output pairs may be left floating. Unused single-ended outputs
must have a balanced load. For AC–coupled applications, the output stage emitter follower must
have a DC current path to ground. See “Termination” section.
VCC
14, 20
Positive Power Supply: Both V
CC
pins must be connected to the same power supply externally.
Bypass with 0.1
μ
F//0.01
μ
F low ESR capacitors.
PACKAGE/ORDERING INFORMATION
20-Pin TSSOP (K4-20-1)
Ordering Information
(1)
Package
Type
K4-20-1
K4-20-1
K4-20-1
Operating
Range
Industrial
Industrial
Industrial
Package
Marking
XEP56V
XEP56V
XEP56V with
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Pb-Free
NiPdAu
Part Number
SY100EP56VK4I
SY100EP56VK4ITR
(2)
SY100EP56VK4G
(3)
SY100EP56VK4GTR
(2, 3)
K4-20-1
Industrial
XEP56V with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25
°
C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
VBB0
D0b
/D0b
D1a
/D1a
VBB1
D1b
/D1b
18 /Q0
SEL0
COM_SEL
SEL1
VEE
17
16
15
14
13
12
11
19
20
1
2
3
4
5
6
7
8
9
10
D0a
/D0a
/Q1
Q1
VCC
Q0
VCC
1
0
1
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100EP56VK4I TR | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V/5V Dual Differential 2:1 Multiplexer (I Temp) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY100EP57VK4G | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V/5V Differential 4:1 Multiplexer (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY100EP57VK4G TR | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V/5V Differential 4:1 Multiplexer (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY100EP57VK4I | 功能描述:IC MUX DIFF 4:1 3.3V/5V 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:100EP 標準包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
| SY100EP57VK4I TR | 功能描述:IC MUX DIFF 4:1 3.3V/5V 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:100EP 標準包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
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