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參數(shù)資料
| 型號： | SY100EL91ZITR |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR |
| 中文描述： | TRIPLE PECL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 65K |
| 代理商： | SY100EL91ZITR |
1
SY100EL91
Micrel, Inc.
M9999-031306
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
I
620ps typical propagation delay
I
Fully differential design
I
Supports standard operation
I
Available in 20-pin SOIC package
The SY100EL91 is a triple PECL-to-ECL translator. It
receives standard voltage PECL signals and translates
them to different ECL output signals.
A V
BB
output is provided for interfacing with single
ended PECL signals at the input. If a single ended input
is to be used, the V
BB
output should be connected to the
D input. The active signal would then drive the D input.
When used, the V
BB
output should be bypassed to ground
via a 0.01
μ
F capacitor. The V
BB
output is designed to act
as the switching reference for the EL91 under single
ended input switching conditions. As a result this pin can
only source/sink up to 0.5mA of current.
To accomplish the level translation the EL91 requires
three power rails. The V
CC
supply should be connected
to the positive supply, and the V
EE
pin should be
connected to the negative power supply. The GND pins
as expected are connected to the system ground plane.
Both V
EE
and V
CC
should be bypassed to ground via
0.01
μ
F capacitors.
Under open input conditions, the D input will be biased
at V
CC
/2 and the D input will be pulled to GND. This
condition will force the Q output to a LOW, ensuring
stability.
FEATURES
TRIPLE
PECL-TO-ECL TRANSLATOR
Pin
Function
Dn
PECL Inputs
Q
n
ECL Outputs
PECL_V
BB
PECL Reference Voltage Output
SY100EL91
PIN NAMES
Rev.: E
Issue Date:
Amendment: /0
March 2006
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY100EL91ZC | 3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR |
| SY100EL91ZCTR | 3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR |
| SY100EL91ZG | 3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR |
| SY100EL91ZGTR | 3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR |
| SY100EL91ZI | 3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100EL92 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:TRIPLE LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR |
| SY100EL92_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:TRIPLE LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR |
| SY100EL92ZC | 功能描述:IC XLATOR LV/PECL TRPL 20SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100EL 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/無 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應商設備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
| SY100EL92ZC TR | 功能描述:IC TRANSLATOR TRIPLE 20-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100EL 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/無 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應商設備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
| SY100EL92ZCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:TRIPLE LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR |
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