參數(shù)資料
型號(hào): SY100EL57LZC
廠商: MICREL INC
元件分類: 通用總線功能
英文描述: SD Series Silicon PhotoTransistor, TO-46 Metal, Glass Lensed Can Package
中文描述: 100EL SERIES, 4 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO16
封裝: 0.150 INCH, SOIC-16
文件頁數(shù): 1/4頁
文件大?。?/td> 62K
代理商: SY100EL57LZC
TRUTH TABLE
PIN NAMES
DESCRIPTION
Rev.: A
Issue Date:
Amendment: /0
March, 1999
Pin
Function
D
0-3
Differential Data Inputs
SEL
0, 1
Mux Select Inputs
V
BB
1, 2
Reference Outputs
Q
Data Outputs
SEL1
SEL0
DATA OUT
L
L
D
0
L
H
D
1
H
L
D
2
H
H
D
3
FEATURES
PIN CONFIGURATION/BLOCK DIAGRAM
I
3.3V power supply
I
Useful as either 4:1 or 2:1 multiplexer
I
V
BB
output for single-ended operation
I
75K
internal input pulldown resistors
I
Available in 150 mil 16-pin SOIC package
The SY100EL57L is a full differential 4:1 multiplexer.
By leaving the SEL1 line open (pulled LOW via the input
pulldown resistors) the device can also be used as a
differential 2:1 multiplexer with SEL0 input selecting between
D0 and D1. The fully differential architecture of the EL57L
makes it ideal for use in low skew applications such as
clock distribution.
The SEL1 is the most significant select line. The binary
number applied to the select inputs will select the same
numbered data input (i.e., 00 selects D0).
Multiple V
BB
outputs are provided for single-ended or
AC coupled interfaces. In these scenarios, the V
BB
output
should be connected to the data bar inputs and bypassed
via a 0.01
μ
F capacitor to ground. Note that the V
BB
output
can source/sink up to 0.5mA of current without upsetting
the voltage level.
3.3V 4:1 DIFFERENTIAL
MULTIPLEXER
SY100EL57L
SOIC
TOP VIEW
4:1
D0
1
2
3
4
5
6
7
8
D0
D1
D1
D2
D2
D3
D3
16
15
14
13
12
11
10
9
V
CC
SEL0
SEL1
Q
Q
V
BB1
V
EE
V
BB2
1
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