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參數(shù)資料
| 型號： | SY100EL16VDXC |
| 廠商： | MICREL INC |
| 元件分類： | Buffer和線驅(qū)動 |
| 英文描述： | ENHANCED DIFFERENTIAL RECEIVER |
| 中文描述： | LINE RECEIVER, UUC10 |
| 封裝： | 0.039 X 0.052 X 0.0145 INCH, DIE-10 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 142K |
| 代理商： | SY100EL16VDXC |
The SY10/100EL16VA-VF are differential receivers.
The devices are equivalent to SY10/100EL16 or SY10/
100EL16V with enhanced capabilities. The QHG, /QHG
outputs have a DC gain several times larger than the DC
gain of the Q output.
The SY10/100EL16VA have an identical pinout to the
SY10/100EL16 or SY10/100EL16V. It provides a VBB
output for either single-ended application or as a DC
bias for AC coupling to the device.
The SY10/100EL16VB are very similar to the SY10/
100EL16VA. The /Q output is provided for feedback
purposes.
The SY10/100EL16VC provides an /EN input which is
synchronized with the data input (D) signal in a way that
provides glitchless gating of the QHG and /QHG outputs. When
the /EN signal is LOW, the input is passed to the outputs and
the data output equals the data input. When the data input is
HIGH and the /EN goes HIGH, it will force the QHG LOW and
the /QHG HIGH on the next negative transition of the data
input. If the data input is LOW when the /EN goes HIGH, the
next data transition to a HIGH is ignored and QHG remains
LOW and /QHG remains HIGH. The next positive transition of
the data input is not passed on to the data outputs under these
conditions. The QHG and /QHG outputs remain in their dis-
abled state as long as the /EN input is held HIGH. The /EN
input has no influence on the /Q output and the data input is
passed on (inverted) to this output whether /EN is HIGH or
LOW. This configuration is ideal for crystal oscillator applica-
tions, where the oscillator can be free running and gated on
and off synchronously without adding extra counts to the
output.
The SY10/100EL16VD provides the flexibility of all the
combinations in DIE form, in 16-pin 150mil SOIC package or
in 10-pin MSOP package. The 16-pin SOIC and 10-pin MSOP
packages are ideal for prototyping DIE applications.
The SY10/100EL16VE are similar to the SY10/100EL16VB
where the Q, /Q output is made available differently. In this
package option, VBB is no longer provided.
The SY10/100EL16VF are similar to the SY10/100EL16VC,
offering the D, /D inputs rather than the VBB output.
DESCRIPTION
s 3.3V and 5V power supply options
s 250ps propagation delay
s Very high voltage gain vs. standard EL16 or EL16V
s Ideal for Pulse Amplifier and Limiting Amplifier
applications
s Data synchronous Enable/Disable (/EN) on QHG and
/QHG provides for complete glitchless gating of the
outputs
s Ideal for gating timing signals
s Complete solution for high quality, high frequency
crystal oscillator applications
s Internal 75K Ohm input pull-down resistors
s Available in both 8 and 16-pin SOIC package; 8 and
10-pin (3mm) MSOP and in DIE form
FEATURES
SY10EL16VA-VF
SY100EL16VA-VF
FINAL
ENHANCED
DIFFERENTIAL
RECEIVER
Pin
Function
D
Data Inputs
Q
Data Outputs
QHG
Data Outputs w/High Gain
VBB
Reference Voltage Output
/EN
Enable Input
PIN NAMES
/EN
QHG Output
0
Data
1
Logic Low
TRUTH TABLE
1
Rev.: M
Amendment: /0
Issue Date:
February 2003
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY10EL16VEKCTR | ENHANCED DIFFERENTIAL RECEIVER |
| SY100EL16VEKCTR | ENHANCED DIFFERENTIAL RECEIVER |
| SY10EL16VDKCTR | ENHANCED DIFFERENTIAL RECEIVER |
| SY100EL16VDKCTR | ENHANCED DIFFERENTIAL RECEIVER |
| SY10EL16VEZCTR | FlukeView Forms Software Version 3.0 and Cable ; For Use With:Fluke DMMs RoHS Compliant: NA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100EL16VDZC | 功能描述:IC RCVR DIFF 5V/3.3V 16-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:100EL 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SY100EL16VDZC TR | 功能描述:IC RCVR DIFF 5V/3.3V 16-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:100EL 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SY100EL16VDZCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:ENHANCED DIFFERENTIAL RECEIVER |
| SY100EL16VDZG | 功能描述:IC RCVR DIFF 3.3/5V 16-SOIC RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:100EL 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SY100EL16VDZG TR | 功能描述:IC RCVR DIFF 3.3/5V 16-SOIC RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:100EL 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
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