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參數(shù)資料
| 型號(hào)： | SY100E452JITR |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 5-BIT DIFFERENTIAL REGISTER |
| 中文描述： | 100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 63K |
| 代理商： | SY100E452JITR |
Pin
Function
D [0:4], /D [0:4]
Differential Data Inputs
MR
Master Reset Input
CLK, /CLK
Differential Clock Input
V
BB
V
BB
Reference Output
Q [0:4], Q [0:4]
Differential Data Outputs
V
CCO
V
CC
to Output
DESCRIPTION
FEATURES
I
Differential D, CLK and Q
I
Extended 100E V
EE
range of –4.2V to –5.5V
I
VBB output for single-ended use
I
1100MHz min. toggle frequency
I
Asynchronous Master Reset
I
Fully compatible with Motorola MC10E/100E452
I
Available in 28-pin PLCC package
The SY10/100E452 are 5-bit differential registers with
differential data (inputs and outputs) and clock. The
registers are triggered by a positive transition of the
positive clock (CLK) input. A high on the Master Reset
(MR) asynchronously resets all registers so that the Q
outputs go LOW.
The differential input structures are clamped so that
the inputs of unused registers can be left open without
upsetting the bias network of the devices. The clamping
action will assert the /D and the /CLK sides of the inputs.
Because of the edge-triggered flip-flop nature of the
devices, simultaneously opening both the clock and data
inputs will result in an output which reaches an
unidentified but valid state.
The fully differential design of the devices makes them
ideal for very high frequency applications where a
registered data path is necessary.
5-BIT DIFFERENTIAL
REGISTER
SY10E452
SY100E452
Rev.: D
Issue Date:
Amendment: /0
May, 1999
BLOCK DIAGRAM
D
0
D
0
Q
0
Q
0
V
BB
CLK
CLK
MR
D
Q
R
D
1
D
1
Q
1
Q
1
D
Q
R
D
2
D
2
Q
2
Q
2
D
Q
R
D
3
D
3
Q
3
Q
3
D
Q
R
D
4
D
4
Q
4
Q
4
D
Q
R
PIN CONFIGURATION
PIN NAMES
18
17
16
15
14
13
12
5
6
7
8
9
10 11
26
27
28
1
2
3
4
TOP VIEW
PLCC
J28-1
25 24 23 22 21 20 19
MR
CLK
CLK
V
EE
V
BB
D
2
D
2
D
1
D
0
V
C
Q
0
D
1
D
0
Q
0
Q
3
Q
3
V
CC
Q
2
Q
2
Q
1
Q
1
D
4
V
C
Q
4
D
3
D
3
D
4
Q
4
1
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100E452JY | 功能描述:寄存器 6-bit Register Differential Data Clock (I Temp, Lead Free) RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SY100E452JY TR | 功能描述:寄存器 6-bit Register Differential Data Clock (I Temp, Lead Free) RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SY100E457 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER |
| SY100E457JC | 功能描述:IC MUX TRIPLE DIFF 2:1 28-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號(hào)開關(guān)，多路復(fù)用器，解碼器 系列:100E 標(biāo)準(zhǔn)包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨(dú)立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
| SY100E457JC TR | 功能描述:IC MUX TRIPLE DIFF 2:1 28-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號(hào)開關(guān)，多路復(fù)用器，解碼器 系列:100E 標(biāo)準(zhǔn)包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨(dú)立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
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