參數(shù)資料
型號: SY100E446JZ TR
廠商: Micrel Inc
文件頁數(shù): 1/9頁
文件大?。?/td> 0K
描述: IC CONV 4-BIT SER/PAR 28-PLCC
標準包裝: 750
應(yīng)用: 數(shù)據(jù)傳輸
接口: 并行/串行
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
其它名稱: SY100E446JZTR
SY100E446JZTR-ND
1
SY10E446
SY100E446
Micrel, Inc.
M9999-032206
hbwhelp@micrel.com or (408) 955-1690
Pin
Function
SIN, SIN
Differential Serial Data Input
D0 – D3
Parallel Data Input
SOUT, SOUT
Differential Serial Data Output
CLK, CLK
Differential Clock Input
CL/4, CL/4
Differential 4 Clock Output
CL/8, CL/8
Differential 8 Clock Output
MODE
Conversion Mode, 4-bit/8-bit
SYNC
Conversion Synchronizing Input
VCCO
VCC to Output
DESCRIPTION
FEATURES
s On-chip clock
÷4 and ÷8
s Extended 100E VEE range of –4.2V to –5.5V
s 1.6Gb/s typical data rate capability
s Differential clock and serial inputs
s VBB output for single-ended use
s Asynchronous data synchronization
s Mode select to expand to 8 bits
s Internal 75K
input pulldown resistors
s Fully compatible with Motorola MC10E/100E446
s Available in 28-pin PLCC package
4-BIT PARALLEL-TO-SERIAL
CONVERTER
The SY10/100E446 are integrated 4-bit parallel-to-
serial data converters. These devices are designed to
operate for NRZ data rates of up to a minimum of 1.3Gb/
s. The chips generate a divide-by-4 and a divide-by-8
clock for both 4-bit conversion and a two-chip 8-bit
conversion function. The conversion sequence was
chosen to convert the parallel data into a serial stream
from bit D0 to D3. A serial input is provided to cascade
two E446 devices for 8-bit conversion applications.
The SYNC input will asynchronously reset the internal
clock circuitry. This pin allows the user to reset the internal
clock conversion unit and, thus, select the start of the
conversion process.
The MODE input is used to select the conversion mode
of the device. With the MODE input LOW (or open) the
device will function as a 4-bit converter. When the mode
input is driven HIGH, the internal load clock will change
on every eighth clock cycle, thus allowing for an 8-bit
conversion scheme using two E446s. When cascaded in
an 8-bit conversion scheme, the devices will not operate
at the 1.3Gb/s data rate of a single device. Refer to the
applications section of this data sheet for more information
on cascading the E446.
For lower data rate applications, a VBB reference
voltage is supplied for single-ended inputs. When
operating at clock rates above 500MHz, differential input
signals are recommended. For single-ended inputs, the
VBB pin is tied to the inverting differential input and
bypassed via a 0.01
F capacitor. The VBB provides the
switching reference for the input differential amplifier. The
VBB can also be used to AC couple an input signal.
SY10E446
SY100E446
PIN NAMES
Rev.: F
Amendment: /0
Issue Date:
March 2006
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