參數(shù)資料
型號(hào): SY100E116JY TR
廠商: Micrel Inc
文件頁數(shù): 1/4頁
文件大?。?/td> 0K
描述: IC LINE RCVR QUINT DIFF 28-PLCC
標(biāo)準(zhǔn)包裝: 750
系列: 100E
邏輯類型: 差分接收器
電源電壓: 4.2 V ~ 5.5 V
位數(shù): 5
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC
包裝: 帶卷 (TR)
其它名稱: SY100E116JYTR
SY100E116JYTR-ND
1
SY10E116
SY100E116
Micrel, Inc.
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
FEATURES
s 450ps max. Propagation Delay
s Extended 100E VEE range of –4.2V to –5.5V
s VBB output for single-ended reception
s Fully compatible with industry standard 10KH,
100K I/O levels
s Internal 75K
input pulldown resistors
s Fully compatible with Motorola MC10E/100E116
s Available in 28-pin PLCC package
DESCRIPTION
The SY10/100E116 are quint differential line receivers
designed for use in new, high-performance ECL systems.
These devices have emitter-follower outputs and an
internally generated reference supply (VBB) for single-
ended reception.
Active current sources combined with Micrel’s ASSET
technology provide the receivers with excellent common
mode noise rejection.
The receiver design features clamp circuitry to cause a
defined output state if both the inverting and non-inverting
inputs are left open; in this case the Q output goes LOW,
while the Q output goes HIGH.
If both inverting and non-inverting inputs are at equal
potential, the receiver does
not go to a defined state, but
rather shares current in normal differential amplifier fashion,
producing output voltage levels midway between HIGH
and LOW.
The VBB output is intended for use as a reference
voltage for single-ended reception of ECL signals to that
device only. When using VBB for this purpose, it is
recommended that VBB is decoupled to VCC via a 0.01
F
capacitor.
For higher bandwidth, please refer to the SY10/100E416
device.
QUINT DIFFERENTIAL
LINE RECEIVER
SY10E116
SY100E116
BLOCK DIAGRAM
Pin
Function
D0, D0-D4, D4
Differential Input Pairs
Q0, Q0-Q4, Q4
Differential Output Pairs
VBB
Reference Voltage Output
VCCO
VCC to Output
PIN NAMES
VBB
Q0
Q1
Q2
Q3
Q4
D0
D1
D2
D3
D4
Rev.: H
Amendment: /0
Issue Date:
March 2006
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