參數(shù)資料
型號(hào)： STV9936PS
英文描述： 120MHZ ON SCREEN DISPLAY FOR MONITORS WITH 4 TRUE INDEPENDANT WINDOW DISPLAYS
中文描述： 120MHz的屏幕顯示的4真獨(dú)立的窗口監(jiān)測(cè)儀顯示展示
文件頁(yè)數(shù)： 14/48頁(yè)
文件大小： 1004K
代理商： STV9936PS
Window Specifications
STV9936P/S
14/48
The range of the vertical delay is from 2 to 1022 scan lines, in steps of 4 scan lines each.
General Vertical Delay = VD[7:0] x 4 + 2
The default value is 0h (top of screen).
3.3
Window Positions in the Frame
All values are referenced to the origin coordinates (HD, VD). For more information, refer to
Figure 5 on page 12
.
3.3.1
Window Horizontal Delay
The window horizontal delay defines the horizontal start position for each separate OSD window.
This value is selected by bits HDW1[6:0], HDW2[6:0], HDW3[6:0] and HDW4[6:0], respectively.
The range of the window horizontal delay is from 0 to 1524 pixels, in steps of 12 pixels each.
Window Horizontal Delay = HDWi[6:0] x 12 pixels
The total horizontal delay of a window is:
General Horizontal Delay + HDWi[6:0] x 12 pixels; or,
HD[6:0] x 6 pixels + HDWi[6:0] x 12 pixels + (50 pixels
Phase Error Detection Pulse Width).
The default values for the window horizontal delay for each of the four OSD windows is given in
Table 8
.
3.3.2
Window Vertical Delay
The window vertical delay defines the vertical start position for each separate OSD window. This
value is selected by bits VDW1[5:0], VDW2[5:0], VDW3[5:0] and VDW4[5:0], respectively.
The range of the window vertical delay is from 0 to 63 rows of characters, in steps of 1 character row
each. It is important to note that the height of each character row is defined by the row height
parameter. For more information, refer to
Section 4.4: Row Height (Space Lines) on page 20
.
Window Vertical Delay = VDWi[5:0] x Row_Height
The total vertical delay of a window is:
General Vertical Delay + VDWi[5:0] x Row_Height (in scan lines); or,
(VD[7:0] x 4 + 2) + VDWi[5:0] x Row_Height (in scan lines).
Table 8: Window Horizontal Delay
FWR
FAC
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
80h
0Ch, 11h,
16h, 1Bh
0h, 20h,
0h, 10h
HDWi[6:0]
Table 9: Window Vertical Delay
FWR
FAC
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
80h
0Dh, 12h,
17h, 1Ch
0h, 0h,
Ch, Ch
VDWi[5:0]
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