參數(shù)資料
型號： STR91XF
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： ARM966E-S 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC Motor Control, 4 Timers, ADC, RTC, DMA
中文描述： ARM966E - ? 16/32位閃存微控制器與以太網(wǎng)，USB，加拿大，交流電機控制，4個計時器，模數(shù)轉(zhuǎn)換器，RTC和DMA的
文件頁數(shù)： 53/72頁
文件大小： 664K
代理商： STR91XF
STR91xF
Electrical characteristics
57/72
Table 18.
EMI write operation
Notes: 1 ALE_LENGTH = 1 by default (can be programmed to be 2 by setting the bits In the SCU_SCR0
register)
2 WSTWR =1Fh by default (WR wait state time = WSTWR x tBCLK, WSTWR can be programmed
in the EMI_WCRx Register)
3 WSTWEN= 0 by default (WR assertion delay from chip select. WSTWEN can be programmed
in the EMI_WECRx Register)
4 When the CPU executes a 16-bit write to a x8 EMI bus, the second write cycle's address setup
time is defined as tWAS=(WSTWEN - ) x tBCLK
Figure 13. Non-Mux Bus (8-bit) write timings
Symbol
Parameter
Test
Conditions
Value
Unit
Typ
tWCR
WRn to CSn inactive
tBCLK/2
ns
tWP
Write Pulse Width
(WSTWR-WSTWEN+1) x tBCLK
ns
tWDS
Write Data Setup Time
(non-mux mode)
(WSTWEN+1/2) x tBCLK
ns
Write Data Setup Time
(mux mode )
ALE length=1
WSTWEN>2
(WSTWEN - 1.5) x tBCLK
ALE length=2
WSTWEN>3
(WSTWEN - 2.5) x tBCLK
tWDH
Write Data Hold Time
tBCLK/2
ns
tWAS
Write Address Setup Time
(WSTWEN+1/2) x tBCLK
4)
ns
tWAH
Write Address Hold Time
tBCLK/2
ns
tAW
ALE pulse width
(ALE_LENGTH) x tBCLK
ns
tAAH
Address to ALE hold time
tBCLK/2
ns
tAAS
Address to ALE setup time
(ALE_LENGTH) x tBCLK
ns
tWCR
tWAH
tWDH
tWP
Address
Data
tWAS
tWDS
EMI_CSxn
EMI_A[15:0]
EMI_D[7:0]
EMI_BWR_WRLn
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