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參數(shù)資料
| 型號(hào)： | STP4NA100 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32BIT W/ CACHE, MMU, FPU |
| 中文描述： | ? -快速通道增強(qiáng)型功率MOS器件 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大小： | 77K |
| 代理商： | STP4NA100 |
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Q
g
Q
gs
Q
gd
Turn-on Time
Rise Time
V
DD
R
G
= 4.7
V
GS
= 10 V
V
DD
= 800 V I
D
= 4.2 A V
GS
= 10
V
= 500 V I
D
= 2.1 A
14
12
ns
ns
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
59
9.4
26.5
nC
nC
nC
SWITCHING OFF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 800 V I
D
= 4.2 A
R
G
= 47
V
GS
= 10 V
(see test circuit, figure 5)
94
30
142
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(
)
Source-drain Current
Source-drain
(pulsed)
Forward On Voltage
Current
4.2
16.8
A
A
V
SD
(
)
I
SD
= 4.2 A V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse
Time
Reverse
Charge
Reverse
Current
Recovery
Recovery
Recovery
I
SD
= 4.2 A di/dt = 100 A/
μ
s
V
DD
= 100 V T
j
= 150
o
C
(see circuit, figure 5)
1000
14
28
ns
μ
C
A
(
) Pulsed: Pulse duration = 300
μ
s, duty cycle 1.5 %
(
) Pulse width limited by safe operating area
STP4NA100
3/5
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