參數(shù)資料
型號(hào)： STMPE801MTR
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8 I/O, PIA-GENERAL PURPOSE, PDSO16
封裝： SOP-16
文件頁(yè)數(shù)： 4/26頁(yè)
文件大小： 399K
代理商： STMPE801MTR
I2C module
STMPE801
12/26
5.7
Operation modes
Figure 5.
Read and write modes (random and sequential)
Table 8. Operation modes
Mode
Bytes
Programming Sequence
Read
≥1
START, Device Address, R/W = 0, Register Address to be read
RESTART, Device Address, R/W = 1, Data Read, STOP
If no STOP is issued, the Data Read can be continuously preformed. If
the register address falls within the range that allows address auto-
increment, then register address auto-increments internally after every
byte of data being read. For register address that falls within a non-
incremental address range, the address will be kept static throughout the
entire read operations. Refer to the Memory Map table for the address
ranges that are auto and non-increment.
Write
≥1
START, Device Address, R/W = 0, Register Address to be written, Data
Write, STOP
If no STOP is issued, the Data Write can be continuously performed. If
the register address falls within the range that allows address auto-
increment, then register address auto-increments internally after every
byte of data being written in. For register address that falls within a non-
incremental address range, the address will be kept static throughout the
entire write operations. Refer to the Memory Map table for the address
ranges that are auto and non-increment.
One Byte
Read
St
ar
t
Rn
W
=0
Ac
k
Ac
k
re
S
ta
rt
Rn
W
=1
Ac
k
No
A
ck
St
op
More than
One Byte
Read
St
ar
t
Rn
W
=0
Ac
k
Ac
k
re
S
ta
rt
Rn
W
=1
Ac
k
Ac
k
Ac
k
No
A
ck
St
op
One Byte
Write
St
ar
t
Rn
W
=0
Ac
k
Ac
k
Ac
k
St
op
More than
One Byte
Write
St
ar
t
Rn
W
=0
Ac
k
Ac
k
Ac
k
Ac
k
Ac
k
St
op
Master
Slave
Data to
Write + 1
Data to
Write + 2
Dev
Addr
Reg
Addr
Data to
Write
Data
Read + 1
Data
Read + 2
Dev
Addr
Reg
Addr
Data to
be
Written
Dev
Addr
Reg
Addr
Dev
Addr
Data
Read
Dev
Addr
Reg
Addr
Dev
Addr
Data
Read
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