參數(shù)資料
型號: STM6601CQ2BDM6F
廠商: STMICROELECTRONICS
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO12
封裝: 2 X 3 MM, ROHS COMPLIANT, TDFN-12
文件頁數(shù): 3/51頁
文件大?。?/td> 1237K
代理商: STM6601CQ2BDM6F
STM6600 - STM6601
Pin descriptions
Doc ID 15453 Rev 8
EN or EN - enable output
This output is intended to enable system power (see Figure 1). EN is asserted high after
a valid turn-on event has been detected and confirmed (i.e. push-button has been pressed
and held for tDEBOUNCE or more and VCC > VTH+ voltage level has been detected - see
Figure 13). EN is released low if any of the conditions below occur:
a)
the push-button is released before PSHOLD is driven high (valid for STM6600, see
Figure 9) or tON_BLANK expires before PSHOLD is driven high during startup (valid
for both STM6600 and STM6601, see Figure 10 and 12).
b)
PSHOLD is driven low during normal operation (see Figure 14).
c)
an undervoltage condition is detected for more than tSRD + tINT_Min + tDEBOUNCE
(see Figure 21).
d)
a long push of the buttons is detected (only for the device with option “EN
deasserted by long push” - see Figure 19) or PSHOLD is not driven high during
tON_BLANK after a long push of the buttons (only for the device with option “RST
asserted by long push” - see Figure 18).
Described logic levels are inverted in case of EN output. Output type is push-pull by default.
RST - reset output
This output pulls low for tREC:
a)
during startup. PB has been pressed (falling edge on the PB detected) and held
for at least tDEBOUNCE and VCC > VTH+ (see Figure 7, 8, 9, 10, 11, 12 and 13 for
more details).
b)
after long push detection (valid only for the device with option “RST asserted by
long push”). PB has been pressed (falling edge on the PB detected) and held for
more than tDEBOUNCE + tSRD (additional Smart Reset
delay time can be adjusted
by the external capacitor CSRD) - see Figure 18.
Output type is active low and open drain by default. Open drain output type requires a pull-
up resistor. A 10 k
Ω is sufficient in most applications.
INT - interrupt output
While the system is under normal operation (PSHOLD is driven high, power for application is
asserted), the INT is driven low if:
a)
VCC falls below VTH- threshold (i.e. undervoltage is detected - see Figure 20 and
21).
b)
the falling edge on the PB is detected and the push-button is held for tDEBOUNCE or
more. INT is driven low after tDEBOUNCE and stays low as long as PB is held. The
INT signal is held high during power-up.
The state of the PBOUT output can be used to determine if the interrupt was caused by
either the assertion of the PB input, or was due to the detection of an undervoltage condition
on VCC.
INT output is asserted low for at least tINT_Min.
Output type is active low and open drain by default. Open drain output type requires a pull-
up resistor. A 10 k
Ω is sufficient in most applications.
GND - ground
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