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參數(shù)資料
| 型號(hào)： | STLC3040 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Third Generation Subscriber Line Interface(用戶(hù)線接口) |
| 中文描述： | 第三代用戶(hù)線接口（用戶(hù)線接口） |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 129K |
| 代理商： | STLC3040 |
PIN DESCRIPTION (STLC3040)
PLCC44
N
o
Symbol
Type
Description
1
DGND
ID
Digital Ground.
2VCC
ID
+5V Digital Supply.
3
FSC
ID
Frame sinc. 8KHz GCI Interface.
4
DCL
ID
Master data Clock GCI Interface.
5
DD
ID
Data Down link GCI Interface
6
DU
OD
Data Up link GCI Interface
7,8
IO1,IO2
I/OD
Programmable I/O GCI controlled
9
C1
OD
State control signal 1. Combination of C1 and C2 define L3000N operating
mode.
10
C2
OD
State control signal 2.
11,12
VL1,VL2
IA
Comparator inputs. These are inputs of the comparator that senses the line
voltage in Loop Open Mode allowing OFF/Hook detection in this mode.
13
SIR0
I/OD
Dedicated, leave open.
14
CAP
I/OA
Reversal. Proper Capacitor should be connected to this pin when soft battery
reversal is needed.
15
IL
IA
Longitudinal Line Current input
16
RAC
I/OA
AC Synthesis Reference Resistor.
17,18
STR0,STR1
I/OD
Dedicated, leave open.
19
IT
IA
Transversal Line Current input
20
ACDC
I/OA
AC/DC Line split. Scaled line current output, DC feedback input.
21
CAC
I/OA
Split Capacitor. AC scaled line current input.
22
RDC
I/OA
DC Synthesis Reference Resistor.
23
REF
I/OA
Reference voltage output. A resistor connected to this pin is setting the internal
reference current.
24
STR2
I/OD
Dedicated, leave open
25
VBIM
IA
Battery image monitor.
26
VOUT
OA
Two wire unbalanced output feeding the line voltage signals (DC, AC, RING,
TTX) scaled by 40.
27
AGND
IA
Analog Ground.
28
PDO
OA
Power Down output. Proper bias current is provided to L3000N by this pin.
When the current is 0 the L3000N goes in Power Down (high impedance).
29
EXT
ID
External Ring Sync. Input.
30
SIR1
I/OD
Dedicated, leave open.
31,32
IDL,IDM
IA
Line-card Identification, least valued bit.
33
VS
IA
-5V Analog Supply.
34
VDD
IA
+5V Analog Supply.
35
IDH
IA
Line-card Id, serial ID signature input.
36
MR
ID
Master reset Input. When connected to VCC the STLC3040 is forced in power
down, all internal registers resetted.
37
SIR2
I/OD
Dedicated, leave open.
38
I1
ID
Digital input read via GCI
39
O1
OD
Digital output written via GCI.
40
SEL24
ID
Select Clock Frequency for GCI Interface 2MHz/4MHz, not affecting the data rate.
41,42,43
TS2,TS1,TS0
ID
GCI Select Time Slot Identifier Pins.
44
STR3
I/OD
Dedicated, leave open.
IL
=
Ia – Ib
100
IT
=
Ia
+ Ib
100
L3000N - STLC3040
5/8
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| STLC3055 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:WLL & ISDN-TA SUBSCRIBER LINE INTERFACE CIRCUIT |
| STLC3055N | 制造商:STMicroelectronics 功能描述: |
| STLC3055N_09 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:WLL and ISDN-TA subscriber line interface circuit |
| STLC3055Q | 功能描述:電信線路管理 IC WLL/ISDN-A SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| STLC3055QTR | 功能描述:電信線路管理 IC WLL/ISDN-A SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
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