參數資料
型號: STK17TA8-R45
元件分類: 時鐘/數據恢復及定時提取
英文描述: REAL TIME CLOCK, PDSO48
封裝: 0.300 INCH, 0.025 INCH PITCH, PLASTIC, SSOP-48
文件頁數: 16/25頁
文件大?。?/td> 285K
代理商: STK17TA8-R45
STK17TA8
April 2005
Document Control #ML0025 rev 1.1
23
Flags
0x1FFF0
D7
D6
D5
D4
D3
D2
D1
D0
WDF
AF
PF
OSCF
0
CAL
W
R
WDF
Watchdog Timer Flag. This read-only bit is set to 1 when the watchdog timer is allowed to reach 0
without being reset by the user. It is cleared to 0 when the Flags/Control register is read.
AF
Alarm Flag. This read-only bit is set to 1 when the time and date match the values stored in the
alarm registers with the match bits = 0. It is cleared when the Flags/Control register is read.
PF
Power-fail Flag. This read-only bit is set to 1 when power falls below the power-fail threshold
Vswitch. It is cleared to 0 when the Flags/Control register is read.
OSCF
Oscillator Fail Flag. Set to 1 on power-up only if the oscillator is not running in the first 5ms of
power-on operation. This indicates that time counts are no longer valid. The user must reset this
bit to 0 to clear this condition. The chip will not clear this flag. This bit survives power cycles.
CAL
Calibration Mode. When set to 1, a 512Hz square wave is output on the INT pin. When set to 0,
the INT pin resumes normal operation. This bit defaults to 0 (disabled) on power up.
W
Write Time. Setting the W bit to 1 freeze updates of the timekeeping registers. The user can then
write them with updated values. Setting the W bit to 0 causes the contents of the time registers to
be transferred to the timekeeping counters.
R
Read Time. Setting the R bit to 1 copies a static image of the timekeeping registers and places
them in a holding register. The user can then read them without concerns over changing values
causing system errors. The R bit going from 0 to 1 causes the timekeeping capture, so the bit must
be returned to 0 prior to reading again.
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