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參數(shù)資料
| 型號(hào)： | ST95022 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 2 Kbit Serial SPI EEPROM with High Speed Clock |
| 中文描述： | 2千位的SPI EEPROM，帶有高速時(shí)鐘 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大小： | 113K |
| 代理商： | ST95022 |
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Page Write Operation
A maximum of 16 bytes of data may be written
during one non-volatile write cycle. All 16 bytes
must reside on the same page. The page write
mode is the same as the byte write mode except
that instead of deselecting the device after the first
byte of data, up to 15 additional bytes can be shifted
in prior to deselecting the chip. A page address
begins with address xxxx 0000 and ends with xxxx
1111. If the address counter reaches xxxx 1111 and
the clock continues, the counter will roll over to the
first address of the page (xxxx 0000) and overwrite
any previously written data. The programming cy-
cle will only start if the S transition occurs just after
the eighth bit of data of a word is received.
POWER ON STATE
After a Power up the ST95022 is in the following
state:
– The device is in the low power standby state.
– The chip is deselected.
– The chip is not in hold condition.
– The write enable latch is reset.
– BP1 and BP0 are unchanged (non-volatile
bits).
DATA PROTECTION AND PROTOCOL SAFETY
– All inputs are protected against noise, see Ta-
ble 5.
– Non valid S and HOLD transitions are not
taken into account.
– S must come high at the proper clock count in
order to start a non-volatile write cycle (in the
memory array or in the cycle status register),
that is the Chip Select S must rise during the
clock pulse following the introduction of a multi-
ple of 8 bits.
– Access to the memory array during non-vola-
tile programming cycle is ignored; however,
the programming cycle continues.
– After any of the operations WREN, WRDI,
RDSR is completed, the chip enters a wait
state and waits for a deselect.
– The write enable latch is reset upon power-up.
– The write enable latch is reset when W is
brought low.
INITIAL DELIVERY STATE
The device is delivered with the memory array in a
fully erased state (all data set at all "1’s" or FFh).
The block protect bits are initialized to 00.
C
D
AI01445
S
Q
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15
HIGH IMPEDANCE
INSTRUCTION
STATUS REG.
0
Figure 11. WRSR: Write Status Register Sequence
9/16
ST95022
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST95022M3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SPI Serial EEPROM |
| ST95022M3TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Kbit Serial SPI EEPROM with High Speed Clock |
| ST950-30L2KI | 功能描述:CAP TANT 950UF 30V 10% AXIAL RoHS:否 類別:電容器 >> 鉭 系列:SuperTan® ST 標(biāo)準(zhǔn)包裝:1,000 系列:TANTAMOUNT® 695D 電容:3.3µF 電壓 - 額定:50V 容差:±20% ESR（等效串聯(lián)電阻）:3.2 歐姆 類型:保形涂層 工作溫度:-55°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:2414（6034 公制） 尺寸/尺寸:0.236" L x 0.135" W（6.00mm x 3.43mm） 高度 - 座高（最大）:0.085"（2.16mm） 引線間隔:- 制造商尺寸代碼:F 特點(diǎn):通用 包裝:帶卷 (TR) 壽命@溫度:- |
| ST950-30L2MI | 功能描述:鉭質(zhì)電容器-濕式 950UF 30V 20% L2 RoHS:否 制造商:Vishay/Tansitor 電容:2800 uF 電壓額定值:35 V ESR:0.35 Ohms 容差:20 % 端接類型:Axial 工作溫度范圍:- 55 C to + 85 C 制造商庫(kù)存號(hào):T4 Case 外殼直徑:9.52 mm 外殼長(zhǎng)度:26.97 mm 外殼寬度: 外殼高度: 系列:STE 產(chǎn)品:Tantalum Wet Hermetically Sealed 封裝:Bulk |
| ST95040 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4K/2K/1K Serial SPI EEPROM with Positive Clock Strobe |
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