參數(shù)資料
型號(hào)： ST72324BLK4BA/XXX
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封裝： 0.400 INCH, PLASTIC, SDIP-32
文件頁(yè)數(shù)： 38/151頁(yè)
文件大?。?/td> 1209K
代理商： ST72324BLK4BA/XXX
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ST72F324L, ST72324BL
132/151
12.12 10-BIT ADC CHARACTERISTICS
Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.
Figure 77. RAIN max. vs fADC with CAIN=0pF
3)
Figure 78. Recommended CAIN & RAIN values.
4)
Notes:
1. When VAREF and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS.
2. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k
). Data
based on characterization results, not tested in production.
3. CPARASITIC represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad ca-
pacitance (3pF). A high CPARASITIC value will downgrade conversion accuracy. To remedy this, fADC should be reduced.
4. This graph shows that depending on the input signal variation (fAIN), CAIN can be increased for stabilization time and
decreased to allow the use of a larger serial resistor (RAIN).
5.The analog inputs of ROM devices are designed to be negative current tolerant. On Flash devices, injecting negative
current on any of the analog input pins significantly reduces the accuracy of any conversion being performed on any an-
alog input.
Analog pins can be protected against negative injection by adding a Schottky diode (pin to ground). Injecting negative
current on digital input pins degrades ADC accuracy especially if performed on a pin close to the analog input pins.
Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in Section 12.8 does not affect the ADC
accuracy.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fADC
ADC clock frequency
0.4
1
MHz
VAREF
Analog reference voltage 1)
VDD
V
VAIN
Conversion voltage range 2)
VSSA
VAREF
Ilkg
Positive input leakage current for analog
input
-40°C
≤T
A≤85°C range
1
A
ROM devices: negative input leakage
current on analog pins 5)
VIN<VSS, | IIN |< 400A
on adjacent analog pin
56
A
RAIN
External input impedance
see
and
782)3)4)
k
CAIN
External capacitor on analog input
pF
fAIN
Variation freq. of analog input signal
Hz
CADC
Internal sample and hold capacitor
12
pF
tADC
Conversion time (Sample+Hold)
fCPU=4MHz, SPEED=0 fADC=1MHz
15
s
tADC
- No of sample capacitor loading cycles
- No. of Hold conversion cycles
4
11
1/fADC
0
5
10
15
20
25
30
35
40
45
010
30
70
CPARASITIC (pF)
Max
.R
AI
N
(
K
ohm)
1 MHz
0.1
1
10
100
1000
0.01
0.1
1
10
fAIN(KHz)
Max.
R
AI
N
(Kohm)
Cain 10 nF
Cain 22 nF
Cain 47 nF
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ST72324BLK4T6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3V range 8-bit MCU with 8 to 32K Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI interface
ST72324BLK4TA 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
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