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參數(shù)資料
| 型號(hào)： | ST62T18C |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT MCUs WITH A/D CONVERTER, AUTO-RELOAD TIMER, UART, OSG, SAFE RESET AND 20-PIN PACKAGE |
| 中文描述： | 8位單片機(jī)與微控制器/ D轉(zhuǎn)換器，自動(dòng)重加載定時(shí)器，UART的秘書長(zhǎng)辦公室，安全復(fù)位和20管腳封裝 |
| 文件頁(yè)數(shù)： | 50/82頁(yè) |
| 文件大?。?/td> | 536K |
| 代理商： | ST62T18C |
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ST62T18C/E18C
AUTO-RELOAD TIMER
(Cont’d)
AR Status Control Register 1(ARSC1)
Address: E7h
—
Read/Write
Bist 7-5 =
PS2-PS0
: Prescaler Division Selection
Bits 2-0. These bits determine the Prescaler divi-
sion ratio. The prescaler itself is not affected by
these bits.Theprescaler division ratioislistedinthe
following table:
Table 16. Prescaler Division Ratio Selection
Bit 4 =
D4
: Reserved Must be kept reset.
Bit 3-2=
SL1-SL0
:Timer InputEdgeControl Bits 1-
0.These bits control theedge function of theTimer
input pinforexternalsynchronization.IfbitSL0isre-
set, edgedetectionis disabled; ifset edge detection
is enabled.If bit SL1 is reset,theARTimer inputpin
is rising edgesensitive; if set, it is falling edge sen-
sitive.
Bit 1-0 =
CC1-CC0
: Clock Source Select Bit 1-0.
These bits select theclock source for theAR Timer
through the AR Multiplexer. The programming of
the clocksources isexplainedin thefollowingTable
17:
Table 17. ClockSource Selection.
AR Load Register ARLR
. The ARLR loadregister
is used to read or write the ARTC counter register
“on the fly” (while it is counting). The ARLR regis-
ter is not affected by system reset.
AR Load Register (ARLR)
Address: EBh
—
Read/Write
Bit 7-0 =
D7-D0
: Load Register Data Bits. These
are the load register data bits.
AR Reload/Capture Register
. The ARRC reload/
capture register is used to hold the auto-reload
value which is automatically loaded into the coun-
ter when overflow occurs.
AR Reload/Capture (ARRC)
Address: E9h
—
Read/Write
Bit 7-0 =
D7-D0
: Reload/Capture Data Bits These
are the Reload/Capture register data bits.
AR Compare Register
. The CP compare register
is used to holdthe compare value for the compare
function.
AR Compare Register (ARCP)
Address: EAh
—
Read/Write
Bit 7-0 =
D7-D0
: Compare Data Bits These are
the Compare register data bits.
7
0
PS2
PS1
PS0
D4
SL1
SL0
CC1
CC0
PS2
0
0
0
0
1
1
1
1
PS1
0
0
1
1
0
0
1
1
PS0
0
1
0
1
0
1
0
1
ARPSC Division Ratio
1
2
4
8
16
32
64
128
SL1
X
0
1
SL0
0
1
1
Edge Detection
Disabled
Rising Edge
Falling Edge
CC1
0
0
1
1
CC0
0
1
0
1
Clock Source
F
int
F
int
Divided by 3
ARTIMin Input Clock
Reserved
7
0
D7
D6
D5
D4
D3
D2
D1
D0
7
0
D7
D6
D5
D4
D3
D2
D1
D0
7
0
D7
D6
D5
D4
D3
D2
D1
D0
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| ST62T20CB6 | 功能描述:8位微控制器 -MCU OTP EPROM 4K No Intf RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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