參數(shù)資料
型號(hào): ST52502LF2
英文描述: MAX 3000A CPLD 256 MC 144-TQFP
中文描述: 8位紅外驅(qū)動(dòng)重癥監(jiān)護(hù)病房。定時(shí)器/脈寬調(diào)制。 I2C總線。的SPI。脊髓損傷。低電壓
文件頁(yè)數(shù): 61/106頁(yè)
文件大小: 1355K
代理商: ST52502LF2
58/106
Port C Option Register (PORT_C_OR)
Configuration Register 33 (021h) Read/Write
Reset Value: 0000 0000 (00h)
(*) Not used in 28 pin package devices
Note: This register is not used in 20 pin devices
Bit 7-0: ORC7-0 Port C option (see Table 8.1)
Port C Data Direction Register (PORT_C_DDR)
Configuration Register 34 (022h) Read/Write
Reset Value: 0000 0000 (00h)
(*) Not used in 28 pin package devices
Note: This register is not used in 20 pin devices
Bit 7-0: DDRC7-0 Port C direction (see Table 8.1)
0: Port C pin configured as input
1: Port C pin configured as output
Port C Alternate Function (PORT_C_AF)
Configuration Register 35 (023h) Read/Write
Reset Value: 0000 0000 (00h)
Note: This register is not used in 20 pin devices
Bit 7-6: Not Used
Bit 5: AFC5 Alternate Function PC5
0: Digital I/O
1: TRES
Bit 4: AFC4 Alternate Function PC4
0: Digital I/O
1: TX
Bit 3: AFC3 Alternate Function PC3
0: Digital I/O
1: SS
Bit 2: AFC2 Alternate Function PC2
0: Digital I/O
1: MISO
Bit 1: AFC1 Alternate Function PC1
0: Digital I/O
1: MOSI
Bit 0: AFC0 Alternate Function PC0
0: Digital I/O
1: SCK
Note: in order to achieve low current consumption,
the port pins must be configured as input pull-up,
even though they are not existing in the package.
For example in 20 pin devices, the pins PB6-7 and
PC0-7 must be configured in input pull-up.
8.6.2 Input Registers.
Port A Data Input Register (PORT_A_IN)
Input Register 0 (00h) Read only
Reset Value: XXXX XXXX
Bit 7-0: PAI7-0 Port A Input data
The logical level applied in the Port A pins,
configured as digital input, can be achieved by
reading this register.
70
ORC7*
ORC6*
ORC5
ORC4
ORC3
ORC2
ORC1
ORC0
70
DDRC7* DDRC6* DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
70
--
AFB5
AFB4
-
---
70
PAI7
PAI6
PAI5
PAI4
PAI3
PAI2
PAI1
PAI0
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