參數(shù)資料
型號: ST52501LK3
英文描述: MAX 7000 CPLD 192 MC 160-PQFP
中文描述: 8位紅外驅(qū)動重癥監(jiān)護病房。定時器/脈寬調(diào)制。 I2C總線。的SPI。脊髓損傷。低電壓
文件頁數(shù): 74/106頁
文件大?。?/td> 1355K
代理商: ST52501LK3
1 GENERAL DESCRIPTION
1.1 Introduction
ST52F501L/F502L are devices of ST FIVE family
of 8-bit Intelligent Controller Units (ICU), which can
perform, both boolean and Fuzzy algorithms in an
efficient manner, in order to reach the best
performances that the two methodologies allow.
Produced by STMicroelectronics using the reliable
high performance low power/low voltage CMOS
process
for
Single
Voltage
Flash
versions,
ST52F501L/F502L
include
integrated
on-chip
peripherals that allow maximization of system
reliability, and decreased system costs in order to
minimize the number of external components, in
particular it is suitable for portable applications.
The flexible I/O configuration of ST52F501L/F502L
allow one to interface with a wide range of external
devices (for example D/A converters or power
control devices), and to communicate with the
most common serial standards.
ST52F501L/F502L pins are configurable. The user
can set input or output signals on each single pin in
8 different modes, reducing the need for external
components in order to supply a suitable interface
with the port pins.
A hardware multiplier and divider, together with a
wide instruction set, allow the implementation of
complex functions by using a single instruction.
Therefore,
program
memory
utilization
and
computational speed is optimized.
Fuzzy Logic dedicated structures in ST52F501L/
F502L ICU’s can be exploited to model complex
system with high accuracy in a useful and simple
manner.
Fuzzy
Expert
Systems
for
overall
system
management and Fuzzy Real time Controls can be
designed to increase performance at competitive
costs.
The linguistic approach characterizing Fuzzy Logic
is based on a set of IF-THEN rules, which describe
the control behavior and on Membership Functions
associated with input and output variables.
Up to 340 Membership Functions, with triangular
and trapezoidal shapes, or singleton values are
available to describe fuzzy variables.
The Timer/PWM peripheral allows one to manage
power devices and timing signals, by implementing
different operating modes and high frequency
PWM (Pulse Width Modulation) controls. Input
Capture and Output Compare functions are
available on the Timers.
The Timer has a 16-bit programmable internal
Prescaler and a 8-bit Counter, which can use
internal or external START/STOP signals and
clock.
In addition to the features described previously, a
second PWM/Timer includes an IR Driver that can
directly support a wide set of codification types for
remote control signals.
The outputs of the two Timers/PWM can also be
easily combined in AND, OR, XOR and NOT to
generate complex digital waveforms.
An
internal
programmable
WATCHDOG
is
available to avoid loop errors and reset the ICU.
ST52F501L/F502L supply different peripherals to
implement
the
most
common
serial
communication protocols. I2C, SPI and SCI
peripherals
allow
the
implementation
of
synchronous and asynchronous serial protocols.
I2C peripherals can work both in master and slave
mode. SPI implements Single and Multi Master
modes using 3-wire. SCI implements the standard
UART protocols.
Up to 10 interrupt vectors are available, which
allow
synchronization
with
peripherals
and
external devices. Non-Maskable Interrupt and S/W
TRAP
are
available.
All
interrupts
have
configurable priority levels and are maskable
excluding the Non-Maskable Interrupt, which has
fixed top level priority. Two versatile Port Interrupts
are available for synchronization with external
sources.
The ST52F501L/F502L also include an on-chip
Power-on-Reset (POR), which provides an internal
chip reset during power up situation and a
Programmable Low Voltage Detector (PLVD),
which causes the ICU to send an interrupt request
or a reset if the voltage source VDD dips below a
threshold. Three programmable thresholds are
available to work with different supply voltages.
The Power Down Reset (PDR) provides a reset of
the device if the voltage source VDD dips below the
safe supply voltage level (around 1.8 V) even in
Halt mode.
In order to optimize energy consumption, two
different power saving modes are available: Wait
mode and Halt mode.
The Programmable Halt mode Wake-up (PHW)
allows the CPU to wake-up from Halt mode at user
programmed times, either servicing a dedicated
interrupt routine or resetting the device. The PHW
is driven by a dedicated 32 KHz low consumption
internal oscillator.
Internal Oscillator with programmable frequency
(1.25 to 10 MHz ± 1%) is available. External clock,
quartz
oscillator
or
RC
oscillator
are
also
applicable. The device always starts with the
Internal Oscillator, then it reads an Option Byte
where the clock mode to be used is programmed.
Program Memory addressing capability addresses
up to 8 Kbytes of memory location to store both
program instructions and data.
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ST52502LG1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE
ST52502LG2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE