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參數(shù)資料
| 型號： | ST52501LF1 |
| 英文描述： | MAX 7000 CPLD 128 MC 84-PLCC |
| 中文描述： | 8位紅外驅(qū)動重癥監(jiān)護病房。定時器/脈寬調(diào)制。 I2C總線。的SPI。脊髓損傷。低電壓 |
| 文件頁數(shù)： | 72/106頁 |
| 文件大?。?/td> | 1355K |
| 代理商： | ST52501LF1 |
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Figure 11.2 Timer 0 External Start/Stop Mode
TxSTRT
signal
starts/stops
the
Timer
from
counting only if the peripherals are configured in
Timer mode. The Timers are started by writing 1 in
the TXSTRT bit of the PWMx_CR1 and are
stopped by writing 0. This signal can be generated
internally and/or externally by forcing the TSTRT
pin (only TIMER0).
TIMER 0 START/STOP can be given externally on
the TSTRT pin. In this case, the T0STRT signal
allows the user to work in two different configurable
modes:
s
LEVEL (Time Counter): If the T0STRT signal is
high, the Timer starts counting. When the
T0STRT is low the timer stops counting and the
8-bit current value is stored in the
PWM0_COUNT_IN Input Registers.
s
EDGE (Period Counter): After reset, on the first
T0STRT rising edge, TIMER 0 starts counting
and at the next rising edge it stops. In this
manner the period of an external signal may be
measured.
The same above mentioned modes, can be used
to reset the Timer0 by using the TRES pin signal.
The polarity of the T0SRTR Start/Stop signal can
be changed by setting the STRPOL and RESPOL
bits in the INT_POL Configuration Register (01h bit
3 and 4). When these bits are set, the PWM/Timer
0 is Started/Set on the low level or in the falling
edge of the signal applied in the pins.
The Timer output signal, TxOUT, is a signal with a
frequency equal to the one of the 16 bit-Prescaler
output signal, PRESCOUTx, divided by a 8-bit
counter set by writing the Output Register
PWMx_COUNT_OUT.
There can be two types of TxOUT waveforms:
s
type 1: TxOUT waveform equal to a square
wave with a 50% duty-cycle
s
type 2: TxOUT waveform equal to a pulse signal
with the pulse duration equal to the Prescaler
output signal.
11.3 PWM Mode
The PWM working mode for each timer is obtained
by setting the TxMOD bit of the Configuration
Register PWMx_CR1.
The TxOUT signal in PWM Mode consists of a
signal with a fixed period, whose duty cycle can be
modified by the user.
The TxOUT period is fixed by setting the 16-bit
Prescaler bits (TxPRESC) in the PWMx_CR2 and
the 8-bit Reload value by writing the relative Output
Register PWMx_RELOAD. The 16-bit Prescaler
divides the master clock CLKM by powers of two,
determining the maximum length period.
Figure 11.3 TxOUT Signal Types
Level
Ed ge
sta rt
sto p
start
stop
start
01
1
0
4
3
2
Reset
Clock
Cou nted
Va lue
Timer Output
Type 1
Type 2
Prescout*Counter
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST52501LF2 | MAX 7000 CPLD 128 MC 100-TQFP |
| ST52501LF3 | MAX 7000 CPLD 128 MC 100-PQFP |
| ST52501LG1 | MAX 7000 CPLD 128 MC 160-PQFP |
| ST52501LG2 | MAX 7000 CPLD 128 MC 100-TQFP |
| ST52501LG3 | MAX 7000 CPLD 128 MC 100-TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST52501LF2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE |
| ST52501LF3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE |
| ST52501LG1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE |
| ST52501LG2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE |
| ST52501LG3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE |
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